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H8S2673 Просмотр технического описания (PDF) - Renesas Electronics

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H8S2673 Datasheet PDF : 979 Pages
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Item
17.4 Operation
Page
769
19.12 Usage Notes 804
Figure 19.12 Power-
On/Off Timing
(H8S/2678Group)
Section 20 Masked 810
ROM
Revision (See Manual for Details)
Description added
[2] Set the DAOE0 bit ... The output value is expressed by the
following formula:
DADR contents × Vref
256
Figure 19.12 amended
Programming/
erasing
Wait time: x possible Wait time: 100 µs
φ
VCC
tOSC1
Min 0 µs
FWE
MD2 to MD0*1
RES
SWE bit
tMDS*3
Min 0 µs
tMDS*3
SWE set
SWE cleared
(1) Boot Mode
Wait time: x
Programming/
erasing
possible Wait time: 100 µs
φ
VCC
tOSC1
Min 0 µs
FWE
MD2 to MD0*1
RES
tMDS*3
SWE bit
SWE set
(2) User Program Mode
SWE cleared
Description amended
The operating mode enables or disables the on-chip ROM.
The operating mode is selected by the mode setting pins,
such as the FWE and MD2 to MD0 pins shown in table 3.1. ...
Rev. 3.00 Mar 17, 2006 page x of l

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