GS1503B Просмотр технического описания (PDF) - Gennum -> Semtech
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GS1503B Datasheet PDF : 90 Pages
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Table 3-2: Mode B Read Cycle (CPU_SEL set LOW)
Parameter
Read Address Cycle Time
Read Cycle Time
Read Enable Setup Time
Read Address Setup Time
Read Chip Select Setup Time
Read Chip Select Hold Time
Read Data Output Delay Time
Read Data Hold Time
Number
Min
Typ
1
80
–
2
80
–
3
20
–
4
20
–
5
10
–
6
0
–
7
–
–
8
0
–
Max
–
–
–
–
–
–
10
–
Units
ns
ns
ns
ns
ns
ns
ns
ns
CPUADR[1:0]
CPUDAT[7:0]
CPUCS
1
01
Upper Address
1
00
Lower Address
2
11
8
Read
Data
7
CPUWE
5
4
6
3
5
4
6
3
5
6
3
Figure 3-2: Host Interface Mode B Read Cycle Timing (CPU_SEL set LOW)
Table 3-3: Mode B Write Cycle (CPU_SEL set LOW)
Parameter
Write Address Cycle Time
Write Cycle Time
Write Enable Setup Time
Write Address Setup Time
Write Chip Select Setup Time
Write Chip Select Hold Time
Write Data Setup Time
Write Data Hold Time
Number
Min
Typ
1
80
–
2
80
–
3
20
–
4
20
–
5
10
–
6
0
–
7
30
–
8
0
–
Max
–
–
–
–
–
–
–
–
Units
ns
ns
ns
ns
ns
ns
ns
ns
GS1503B HD Embedded Audio CODEC
Data Sheet
37953 - 1
December 2009
15 of 90
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