GL852 Просмотр технического описания (PDF) - GENESYS LOGIC
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GL852 Datasheet PDF : 31 Pages
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GL852 USB 2.0 MTT HUB Controller
Pin Name
X1
X2
GL852
64Pin#
20
21
RESET#
38
GL852
48Pin#
14
15
26
Clock and Reset Interface
I/O Type
Description
I 12MHz crystal clock input.
O 12MHz crystal clock output.
Active low. External reset input, default pull high 10KΩ.
I When RESET# = low, whole chip is reset to the initial
state.
GL852
Pin Name
64 Pin#
TEST
39
GL852
48Pin#
27
System Interface
I/O Type
Description
I
0: Normal operation.
(pd) 1: Chip will be put in test mode.
Power / Ground
GL852
Pin Name
64 Pin#
GL852
I/O Type
48Pin#
Description
AVDD
11,18,22,
28,64
1,7,12,16,19
P
3.3V analog power input for analog circuits.
AGND
1,12,19,
23,29
2,8,13,20,
P Analog ground input for analog circuits.
DVDD
37,47, 25,34,38,44,
52,59
48
P
3.3V digital power input for digital circuits
DGND
36,46,
51,58,62
47
P Digital ground input for digital circuits.
2,5~7,10,
NC 13,16,24,
-
27,30,33
- No connection
Note: Analog circuits are quite sensitive to power and ground noise. PCB layout must take care the power
routing and the ground plane. For detailed information, please refer to GL852 Design Guideline.
Notation:
Type O
I
B
B/I
B/O
P
A
SO
pu
pd
odpu
Output
Input
Bi-directional
Bi-directional, default input
Bi-directional, default output
Power / Ground
Analog
Automatic output low when suspend
Internal pull up
Internal pull down
Open drain with internal pull up
©2000-2007 Genesys Logic Inc. - All rights reserved.
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