FXL4245 Просмотр технического описания (PDF) - Fairchild Semiconductor

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FXL4245

Low-Voltage, Dual-Supply, 8-Bit, Signal Translator with Configurable Voltage Supplies, Signal Levels, and 3-State Outputs

Fairchild Semiconductor 

Functional Description

Power-Up/Power-Down Sequencing

FXL translators offer an advantage in that either VCC

may be powered up first. This benefit derives from the

chip design. When either VCC is at 0V, outputs are in a

High-impedance state. The control inputs (T/R and OE)

are designed to track the VCCA supply. A pull-up resistor

tying OE to VCCA should be used to ensure that bus

contention, excessive currents, or oscillations do not

occur during power-up/power-down. The size of the

pull-up resistor is based upon the current-sinking

capability of the OE driver.

The recommended power-up sequence is:

1. Apply power to either VCC.

2. Apply power to the T/R input (logic HIGH for A-to-B

operation; logic LOW for B-to-A operation) and to

the respective data inputs (A port or B port). This

may occur at the same time as step 1.

3. Apply power to the other VCC.

4. Drive the OE input LOW to enable the device.

The recommended power-down sequence is:

1. Drive OE input HIGH to disable the device.

2. Remove power from either VCC.

3. Remove power from the other VCC.

© 2004 Fairchild Semiconductor Corporation

FXL4245 • Rev. 1.0.3

9

www.fairchildsemi.com

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