UPD75P048GC-AB8 Просмотр технического описания (PDF) - NEC => Renesas Technology
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UPD75P048GC-AB8 Datasheet PDF : 40 Pages
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µPD75P048
MAIN SYSTEM CLOCK OSCILLATOR CIRCUIT CHARACTERISTICS
(Ta = -10 to +70°C, VDD = 2.7 to 6.0 V)
Oscillator
Ceramic
Recommended
Constants
X1
X2
Item
Oscillation
frequency(fX) Note 1
Conditions
VDD = oscillation
voltage range
MIN.
2.0
TYP. MAX. Unit
Note 3
5.0
MHz
Crystal
C1
C2 Oscillation stabiliza- After VDD come to
tion time Note 2
MIN. value of
oscillation voltage
VDD
range
4
ms
X1
C1
X2
C2
Oscillation
frequency (fX) Note 1
Oscillation stabiliza- VDD = 4.5 to 6.0 V
tion time Note 2
2.0
4.19 5.0 Note 3 MHz
10
ms
VDD
30
ms
External Clock
X1
X2
X1 input frequency
(fX) Note 1
2.0
5.0 Note 3 MHz
µPD74HCU04
X1 input high-,
low-level widths
(tXH, tXL)
100
250
ns
Note 1. Only to express the characteristics of the oscillator circuit. For instruction execution time, refer to
AC Characteristics.
2. Time required for oscillation to stabilize after VDD has reached the minimum volue of the oscillation
voltage range or the STOP mode has been released.
3. When the oscillation frequency is 4.19 MHz < fx ≤ 5.0 MHz, do not select PCC = 0011 as the instruction
execution time: otherwise, one machine cycle is set to less than 0.95 µs, falling short of the rated
minimum value of 0.95 µs.
Caution When using the oscillation circuit of the main system clock, wire the portion enclosed in dotted
line in the figures as follows to avoid adverse influences on the wiring capacity:
• Keep the wiring length as short as possible.
• Do not cross the wiring over the other signal lines.
• Do not route the wiring in the vicinity of lines through which a high alternating current flows.
• Always keep the ground point of the capacitor of the oscillator circuit at the same potential as
VDD. Do not connect the ground pattern through which a high curent flows.
• Do not extract signals from the oscillation circuit.
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