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FSQ0765RQUDTU Просмотр технического описания (PDF) - Fairchild Semiconductor

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FSQ0765RQUDTU Datasheet PDF : 19 Pages
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Pin Configuration
FSQ0765R Rev.00
6. Vstr
5. Sync
4. FB
3. VCC
2. GND
1. Drain
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin # Name
Description
1 Drain SenseFET drain. High-voltage power SenseFET drain connection.
2
GND Ground. This pin is the control ground and the SenseFET source.
3
VCC
Power Supply. This pin is the positive supply input. This pin provides internal operating current for
both startup and steady-state operation.
Feedback. This pin is internally connected to the inverting input of the PWM comparator. The
4
FB
collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be
placed between this pin and GND. If the voltage of this pin reaches 6V, the overload protection
triggers, which shuts down the FPS.
5
Sync
Sync. This pin is internally connected to the sync-detect comparator for quasi-resonant switching.
In normal quasi-resonant operation, the threshold of the sync comparator is 1.2V/1.0V.
Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At
6
Vstr
start-up, the internal high-voltage current source supplies internal bias and charges the external
capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is disabled.
It is not recommended to connect Vstr and Drain together.
© 2008 Fairchild Semiconductor Corporation
FSQ0765RQ Rev. 1.0.1
4
www.fairchildsemi.com

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