EM78P153E Просмотр технического описания (PDF) - ELAN Microelectronics

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EM78P153E

8-bit microprocessor designed and developed with low-power and high-speed CMOS technology

ELAN Microelectronics 

EM78P153E

OTP ROM

• IOCC Register is both readable and writable.

6. IOCD (Pull-high Control Register)

7

6

5

4

3

2

/PH7

/PH6

/PH5

/PH4

-

/PH2

• Bit 0 (/PH0) Control bit used to enable the pull-high of P60 pin.

0: Enable internal pull-high

1: Disable internal pull-high

• Bit 1 (/PH1) Control bit is used to enable the pull-high of P61 pin.

• Bit 2 (/PH2) Control bit is used to enable the pull-high of P62 pin.

• Bit 3 Not used.

• Bit 4 (/PH4) Control bit is used to enable the pull-high of P64 pin.

• Bit 5 (/PH5) Control bit is used to enable the pull-high of P65 pin.

• Bit 6 (/PH6) Control bit is used to enable the pull-high of P66 pin.

• Bit 7 (/PH7) Control bit is used to enable the pull-high of P67 pin.

• IOCD Register is both readable and writable.

1

/PH1

0

/PH0

7. IOCE (WDT Control Register)

7

6

5

4

3

2

1

0

WDTE

EIS

-

-

-

-

-

-

• Bit 7 (WDTE) Control bit used to enable Watchdog timer.

0: Disable WDT.

1: Enable WDT.

WDTE is both readable and writable.

• Bit 6 (EIS) Control bit is used to define the function of P60(/INT) pin.

0: P60, bi-directional I/O pin.

1: /INT, external interrupt pin. In this case, the I/O control bit of P60 (bit 0 of IOC6) must be set to "1".

When EIS is "0", the path of /INT is masked. When EIS is "1", the status of /INT pin can also be read

by way of reading Port 6 (R6). Refer to Fig. 7.

EIS is both readable and writable.

• Bits 0~5 Not used.

8. IOCF (Interrupt Mask Register)

7

6

5

4

-

-

-

-

• Bit 0 (TCIE) TCIF interrupt enable bit.

0: disable TCIF interrupt

3

2

1

0

-

EXIE

ICIE

TCIE

This specification is subject to change without prior notice.

12

2002/03/01

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