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DSP56366 Просмотр технического описания (PDF) - Freescale Semiconductor

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производитель
DSP56366
Freescale
Freescale Semiconductor Freescale
DSP56366 Datasheet PDF : 110 Pages
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6 Appendix A, "Power Consumption Benchmark" provides a formula to compute the estimated current requirements
in Normal mode. In order to obtain these results, all inputs must be terminated (i.e., not allowed to float). Measurements are
based on synthetic intensive DSP benchmarks. The power consumption numbers in this specification are 90% of the
measured results of this benchmark. This reflects typical DSP applications. Typical internal supply current is measured with
VCC = 3.3 V at
TJ = 110°C. Maximum internal supply current is measured with VCC = 3.46 V at TJ = 110°C.
7 In order to obtain these results, all inputs, which are not disconnected at Stop mode, must be terminated (i.e., not allowed to
float).
3.5 AC Electrical Characteristics
The timing waveforms shown in the AC electrical characteristics section are tested with a VIL maximum
of 0.3 V and a VIH minimum of 2.4 V for all pins except EXTAL, which is tested using the input levels
shown in Note 3 of the previous table. AC timing specifications, which are referenced to a device input
signal, are measured in production with respect to the 50% point of the respective input signal’s transition.
DSP56366 output levels are measured with the production test machine VOL and VOH reference levels set
at 0.4 V and 2.4 V, respectively.
NOTE
Although the minimum value for the frequency of EXTAL is 0 MHz, the
device AC test conditions are 15 MHz and rated speed.
3.6 Internal Clocks
Characteristics
Internal operation frequency with PLL
enabled
Internal operation frequency with PLL
disabled
Internal clock high period
• With PLL disabled
• With PLL enabled and MF 4
• With PLL enabled and MF > 4
Internal clock low period
• With PLL disabled
• With PLL enabled and MF 4
• With PLL enabled and MF > 4
Internal clock cycle time with PLL
enabled
Table 3-4 Internal Clocks
Expression1, 2
Symbol
Min
Typ
Max
f
(Ef × MF)/(PDF × DF)
f
Ef/2
TH
ETC
0.49 × ETC × PDF ×
0.51 × ETC × PDF ×
DF/MF
DF/MF
0.47 × ETC × PDF ×
0.53 × ETC × PDF ×
DF/MF
DF/MF
TL
ETC
0.49 × ETC × PDF ×
0.51 × ETC × PDF ×
DF/MF
DF/MF
0.47 × ETC × PDF ×
0.53 × ETC × PDF ×
DF/MF
DF/MF
TC
ETC × PDF × DF/MF
DSP56366 Technical Data, Rev. 3.1
3-4
Freescale Semiconductor

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