DS3205 Просмотр технического описания (PDF) - Maxim Integrated

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DS3205

Hot-Swappable Bus Buffer for I2C, SMBus, IPMI, and ATCA

Maxim Integrated 

____________________________________________________________________________________________ DS3205

4. Functional Description

4.1 Overview

See the DS3205 state diagram in Figure 2-3.

4.2 Startup

When the DS3205 is first powered on, it is in a low-power state with the SCLIN, SCLOUT, SDAIN, and SDAOUT

pins in a high-impedance state. If the ENABLE pin is pulled high, the DS3205 waits until the supply voltage rises

above approximately 2V, when the precharge circuitry becomes active and forces 1V through 150kΩ resistors into

all SCL and SDA pins. The 1V precharge minimizes bus disturbances when the backplane and card are at

opposing logic levels. The DS3205 then waits about 130μs for the external connections and internal circuitry to

settle. After this wait time, the DS3205 enters the BUS WAIT state where it looks for either a stop bit on the input

(rising edge on the SDAIN pin while SCLIN remains high) or an input bus idle condition (SDAIN and SCLIN both

high for 140μs) while both SDAOUT and SCLOUT pins are high. Once these conditions are met, the precharge

circuit is turned off and the DS3205 enters the ACTIVE state.

While in the ACTIVE state, the DS3205 establishes a bidirectional connection between the SDAIN and SDAOUT

pins and the SCLIN and SCLOUT pins. The voltage on any bus pin is buffered and offset an additional +75mV

(approximately) to the other side. Whichever side is pulled closest to ground has priority. For example, if SCLOUT

is pulled closer to ground than SCIN, SCIN is driven to a voltage 75mV higher than SCOUT.

4.3 Rise-Time Accelerators

If current acceleration is enabled through the ACIE or ACOE pins, the DS3205 pulls up more strongly, shortening

the rise time compared to using only the external bus pullup resistors. The pullup provided by the driver during

acceleration is approximately 3.5mA instead of its usual 100μA. This acceleration current on one side of the buffer

is activated when the bus voltage on the other side is greater than 0.6V and its slew rate is greater than 0.8V/μs

(ASR low) or 1.2V/μs (ASR high) and the corresponding ACIE and/or ACOE pin is pulled high. The acceleration

current is deactivated after the accelerated bus pin rises within 0.9V of VDD. For example, if the ACOE pin is high,

when the SCLIN pin rises above 0.6V with a fast slew rate, the SCLOUT pin is pulled up towards VDD with more

than 3mA of current. This current ceases when the SCLOUT pin rises to within 0.9V of VDD.

4.4 READY Output Pin

The READY pin is pulled low whenever the DS3205 is not in its ACTIVE state. An external pullup resistor brings

the READY pin high when the bidirectional connection is established.

4.5 ENABLE Input Pin

If the ENABLE pin is pulled low, the backplane side disconnects from the board side and the device enters a low-

power state with the READY pin asserted low. Also, the rise-time accelerators and precharge circuitry are disabled.

Setting ENABLE low causes the device to disconnect the board side from the backplane side and enter the low-

power mode.

4.6 Stuck Bus Condition

If the SDAOUT and SCLOUT pins remain low for 30ms the bus is assumed to be stuck. This 30ms timeout is

restarted only when the SDAOUT and SCLOUT pins are both high. The FAULT pin pulls low and remains low until

the bus is unstuck. If the SBCLK pin is high, the DS3205 attempts to unstick the bus by first disconnecting all SDA

and SCL pins for 50μs, then pulls down on the SCLOUT pin 16 times at a 8kHz rate. If the bus becomes unstuck

during this process (SDAOUT and SCLOUT both go high), the DS3205 returns to the BUS WAIT state. The

precharge circuitry becomes active, and, as soon as a stop bit or bus idle is detected on the input while both

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