DS21554L Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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Компоненты Описание

производитель

DS21554L

DS21354 (3.3V) and DS21554 (5V) E1 Single Chip Transceivers (SCT)

Dallas Semiconductor -> Maxim Integrated 

DS21354 & DS21554

Signal Name:

TCHBLK

Signal Description: Transmit Channel Block

Signal Type:

Output

A user programmable output that can be forced high or low during any of the 32 E1 channels.

Synchronous with TCLK when the transmit side elastic store is disabled. Synchronous with TSYSCLK

when the transmit side elastic store is enabled. Useful for blocking clocks to a serial UART or LAPD

controller in applications where not all E1 channels are used such as Fractional E1, 384 kbps (H0), 768

kbps or ISDN–PRI . Also useful for locating individual channels in drop–and–insert applications, for

external per–channel loopback, and for per–channel conditioning. See Section 12 for details.

Signal Name:

TSYSCLK

Signal Description: Transmit System Clock

Signal Type:

Input

1.544 MHz , 2.048 MHz , 4.096 MHz or 8.192 MHz clock. Only used when the transmit side elastic

store function is enabled. Should be tied low in applications that do not use the transmit side elastic store.

See section 18 on page 86 for details on 4.096 MHz and 8.192 MHz operation using the Interleave Bus

Option.

Signal Name:

TLCLK

Signal Description: Transmit Link Clock

Signal Type:

Output

4 kHz to 20 kHz demand clock (Sa bits) for the TLINK input. See Section 18 for details.

Signal Name:

TLINK

Signal Description: Transmit Link Data

Signal Type:

Input

If enabled, this pin will be sampled on the falling edge of TCLK for data insertion into any combination

of the Sa bit positions (Sa4 to Sa8). See Section 14.1 for details.

Signal Name:

TSYNC

Signal Description: Transmit Sync

Signal Type:

Input / Output

A pulse at this pin will establish either frame or multiframe boundaries for the transmit side. Via TCR1.1,

the DS21354/554 can be programmed to output either a frame or multiframe pulse at this pin. This pin

can also be configured as an input via TCR1.0. See Section 19 for details.

Signal Name:

TSSYNC

Signal Description: Transmit System Sync

Signal Type:

Input

Only used when the transmit side elastic store is enabled. A pulse at this pin will establish either frame or

multiframe boundaries for the transmit side. Should be tied low in applications that do not use the

transmit side elastic store.

Signal Name:

TSIG

Signal Description: Transmit Signaling Input

Signal Type:

Input

When enabled, this input will sample signaling bits for insertion into outgoing PCM E1 data stream.

Sampled on the falling edge of TCLK when the transmit side elastic store is disabled. Sampled on the

falling edge of TSYSCLK when the transmit side elastic store is enabled.

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