DS21552 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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производитель

DS21552

3.3V DS21352 and 5V DS21552 T1 Single-Chip Transceivers

Dallas Semiconductor -> Maxim Integrated 

DS21352/DS21552

Updated on the rising edge of RCLKO with bipolar data out of the line interface. This pin is normally tied to RPOSI.

Signal Name:

RNEGO

Signal Description:

Receive Negative Data Input

Signal Type:

Output

Updated on the rising edge of RCLKO with the bipolar data out of the line interface. This pin is normally tied to RPOSI.

Signal Name:

RCLKO

Signal Description:

Receive Clock Output

Signal Type:

Output

Buffered recovered clock from the T1 line. This pin is normally tied to RCLKI.

Signal Name:

RPOSI

Signal Description:

Receive Positive Data Input

Signal Type:

Input

Sampled on the falling edge of RCLKI for data to be clocked through the receive side framer. RPOSI and RNEGI can be tied

together for a NRZ interface. Can be internally connected to RPOSO by tying the LIUC pin high.

Signal Name:

RNEGI

Signal Description:

Receive Negative Data Input

Signal Type:

Input

Sampled on the falling edge of RCLKI for data to be clocked through the receive side framer. RPOSI and RNEGI can be tied

together for a NRZ interface. Can be internally connected to RNEGO by tying the LIUC pin high.

Signal Name:

RCLKI

Signal Description:

Receive Clock Input

Signal Type:

Input

Clock used to clock data through the receive side framer. This pin is normally tied to RCLKO. Can be internally connected to

RCLKO by tying the LIUC pin high.

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