DS1994 Просмотр технического описания (PDF) - Maxim Integrated

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производитель

DS1994

4Kb Plus Time Memory iButton®

Maxim Integrated 

Figure 11. READ/WRITE TIMING DIAGRAM (continued)

Write-Zero Time Slot

VPULLUP

VPULLUP MIN

VIH MIN

VIL MAX

0V

RESISTOR

MASTER

tSLOT

DS1994

Sampling Window

15µs

60µs

t LOW0

60µs  tLOW0 < tSLOT < 120µs

1µs  tREC < 

tREC

DS1994

Read-Data Time Slot

VPULLUP

VPULLUP MIN

VIH MIN

VIL MAX

0V

tSU

t LOWR

tSLOT

Master

Sampling Window

t RDV

RESISTOR

MASTER

DS1994

60µs  tSLOT < 120µs

1µs  tLOWR < 15µs

0  tRELEASE < 45µs

tREC

tRELEASE

1µs  tREC < 

tRDV = 15µs

tSU < 1µs

Interrupts

If the DS1994 detects an alarm condition, it automatically sets the corresponding alarm flag in the status

register. An interrupt condition begins whenever any alarm flag is set and the flag’s corresponding

interrupt bit is enabled. The interrupt condition ceases when the alarm flags are cleared (i.e., the interrupt

is acknowledged by reading the status register, address 200H) or if the corresponding interrupt enable bit

is disabled.

The DS1994 can produce two types of interrupts: spontaneous interrupts, called type 1, and delayed

interrupts, type 2. Spontaneous interrupts need to be armed by a reset pulse after all communication on

the 1-Wire bus has finished. A single falling slope on the 1-Wire bus disarms this type of interrupt. If an

alarm condition occurs while the device is disarmed, at first a type 2 interrupt is produced.

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