DMC73C168 Просмотр технического описания (PDF) - Daewoo Semiconductor

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DMC73C168

8Bit Single Chip Microcontroller

Daewoo Semiconductor 

8Bit Single Chip Microcontroller

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DMC73C168

4.4 Stack Pointer (SP)

The Stack Pointer(SP) is an 8-bit register in the CPU that is typically used to hold a pointer in RAM

(the Register File). However, the SP can also be used as temporary data storage if a stack is not

implemented, or if the SP contents are not needed. When a stack is implemented just before data is

pushed onto the stack and automatically decremented immediately after data is poped from the

stack. Upon assertion if the RESET function (see Section 4.7) >01 is loaded into the SP. The size

of the stack can be changed from the 254-level stack at RESET to a smaller stack by executing

a stack initialization program as illustrated in Figure 4.4. The This feature allows the stack to be

located anywhere in the Register File. The SP is initialized through the B register (R1).

RF

RF

RF

SP

>0001

>0002

>0003

>0004

>01

ST

Interrupt

PCH

SP

PCL

>04

>0005

PCH

SP

>0006

CALL

PCL

>06

Figure 4.4 Example of Stack Initialization in the Register File

4.5 Status Register (ST)

The Status Register (ST) is an 8-bit register in the CPU that contains three conditional status bits ;

Carry (C), Sign (N), Zero (Z), and a global Interrupt Enable bit (I) as shown in Figure 4-5.

Bit

7

6

5

4

3

2

1

0

C

N

Z

I

FUTURE USE

C : CARRY OUT

N : SIGN

Z : ZERO

I : INTERRUPT ENABLE

Figure 4-5. Status Register (ST)

The C, N and Z bits are used mostly for arithmetic operations, bit rotating, and conditional branching.

The Carry(C) bits is used as the carry-in and carry-out for most of lotate and arithmetic instructions.

The Sign(N) bit contains the most significant bit of the destination operand contents after instruction

execution. The Zero(Z) bit contains a one when all bits of the destination operand are equal to zero

after instruction execution. The C, N and Z status bits also have jump-on-condition instructions

associated them. The global Interrupt Enable (I) bit must be set to one by the EINT instruction in

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