D78054 Просмотр технического описания (PDF) - NEC => Renesas Technology
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Компоненты Описание
производитель
D78054 Datasheet PDF : 62 Pages
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µPD78001B(A), 78002B(A)
3.2 OTHER PINS
Pin Name
I/O
INTP0
Input
INTP1
INTP2
INTP3
SI0
Input
SO0
Output
SB0
Input
SB1
/output
SCK0
Input
/output
TI1
Input
TI2
TO1
Output
TO2
PCL
Output
BUZ
Output
AD0 to AD7 Input
/output
A8 to A15 Output
RD
Output
WR
WAIT
Input
ASTB
Output
RESET
X1
X2
XT1
XT2
VDD
VSS
IC0 to IC3
Input
Input
—
Input
—
—
—
—
Function
After
Reset
Effective edge (rising edge, falling edge, or both rising edge and falling edge) Input
can be specified.
External interrupt input.
Falling edge detection external interrupt input.
Serial interface serial data input.
Input
Serial interface serial data output.
Input
Serial interface serial data input/output.
Input
Serial interface serial clock input/output.
Input
External count clock input to 8-bit timer (TM1).
External count clock input to 8-bit timer (TM2).
8-bit timer (TM1) output.
8-bit timer (TM2) output.
Clock output (for main system clock, subsystem clock trimming).
Buzzer output.
Low-order address/data bus at external memory expansion.
Input
Input
Input
Input
Input
High-order address bus at external memory expansion.
External memory read operation strobe signal output.
External memory write operation strobe signal output.
Wait insertion at external memory access.
Strobe output which latches the address information output at port 4 and
port 5 to access external memory.
System reset input.
Main system clock oscillation crystal connection.
Subsystem clock oscillation crystal connection.
Positive power supply.
Ground potential.
Internal connection. IC0/IC1/IC3 and IC2 should be connected directly to VSS
VDD, respecitively.
Input
Input
Input
Input
—
—
—
Input
—
—
—
—
Dual-
Function Pin
P00
P01
P02
P03
P25/SB0
P26/SB1
P25/SI0
P26/SO0
P27
P33
P34
P31
P32
P35
P36
P40 to P47
P50 to P57
P64
P65
P66
P67
—
—
—
P04
—
—
—
—
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