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CY7C1328G Просмотр технического описания (PDF) - Cypress Semiconductor
Номер в каталоге
Компоненты Описание
производитель
CY7C1328G
4-Mbit (256K x 18) Pipelined DCD Sync SRAM
Cypress Semiconductor
CY7C1328G Datasheet PDF : 16 Pages
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Functional Block Diagram
A0, A1, A
MODE
ADV
CLK
ADSC
ADSP
BW
B
ADDRESS
REGISTER
2 A
[1:0]
Q1
BURST
COUNTER AND
LOGIC
CLR
Q0
DQ
B,
DQP
B
BYTE
WRITE REGISTER
DQ
A ,
DQP
A
BW
A
BYTE
WRITE REGISTER
BWE
GW
CE
1
CE
2
ENABLE
REGISTER
PIPELINED
ENABLE
CE
3
OE
ZZ
SLEEP
CONTROL
CY7C1328G
DQ
B ,
DQP
B
BYTE
WRITE DRIVER
DQ
A,
DQP
A
BYTE
WRITE DRIVER
MEMORY
SENSE
AMPS
OUTPUT
REGISTERS
OUTPUT
BUFFERS
DQ
s,
DQP
A
ARRAY
E
DQP
B
INPUT
REGISTERS
Document #: 38-05523 Rev. *E
Page 2 of 16
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