CY14B256L(2007) Просмотр технического описания (PDF) - Cypress Semiconductor
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CY14B256L Datasheet PDF : 17 Pages
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PRELIMINARY
CY14B256L
Document History Page
Document Title: CY14B256L, 256-Kbit (32K x 8) nvSRAM
Document Number: 001-06422
REV.
ECN NO.
Issue
Date
Orig. of
Change
Description of Change
**
425138 See ECN TUP New Data Sheet
*A
437321 See ECN TUP Show Data Sheet on External Web
*B
471966 See ECN
TUP Changed VIH(min) from 2.2V to 2.0V
Changed tRECALL from 60 µs to 50 µs
Changed Endurance from 1Million Cycles to 500K Cycles
Changed Data Retention from 100 Years to 20 Years
Added Soft Sequence Processing Time Waveform
Updated Part Numbering Nomenclature and Ordering Information
*C
503277 See ECN
PCI Changed from “Advance” to “Preliminary”
Changed the term “Unlimited” to “Infinite”
Changed endurance from 500K cycles to 200K cycles
Device operation: Tolerance limit changed from + 20% to + 15% in the
“Features Section” and “Operating Range Table”
Removed Icc1 values from the DC table for 25 ns and 35 ns industrial grade
Changed VSWITCH(min) from 2.55V to 2.45V
Added temperature spec. to data retention - 20 years at 55°C
Changed the max value of Vcap storage capacitor from 120 µF to 57 µF
Updated “Part Nomenclature Table” and “Ordering Information Table”
*D
597004 See ECN
TUP Removed VSWITCH(min) spec from the AutoStore/Power Up RECALL table
Changed tGLAX spec from 20 ns to 1 ns
Added tDELAY(max) spec of 70 µs in the Hardware STORE Cycle table
Removed tHLBL specification
Changed tSS specification form 70 µs (min) to 70 µs (max)
Changed VCAP(max) from 57 µF to 120 µF
*E
696097 See ECN VKN Added footnote 6 related to HSB
Changed tGLAX to tGHAX
Document #: 001-06422 Rev. *E
Page 17 of 17
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