CXA2025 Просмотр технического описания (PDF) - Sony Semiconductor

Номер в каталоге

Компоненты Описание

производитель

CXA2025

Y/C/RGB/Sync/Deflection for Color TV

Sony Semiconductor 

Definition of I2C Bus Registers

Slave Addresses

88H: Slave receiver

89H: Slave transmitter

CXA2025AS

Control Register

Sub Address

∗ ∗ ∗ 0 0 0 0 0 00 H

∗ ∗ ∗ 0 0 0 0 1 01 H

∗ ∗ ∗ 0 0 0 1 0 02 H

∗ ∗ ∗ 0 0 0 1 1 03 H

∗ ∗ ∗ 0 0 1 0 0 04 H

∗ ∗ ∗ 0 0 1 0 1 05 H

∗ ∗ ∗ 0 0 1 1 0 06 H

∗ ∗ ∗ 0 0 1 1 1 07 H

∗ ∗ ∗ 0 1 0 0 0 08 H

∗ ∗ ∗ 0 1 0 0 1 09 H

∗ ∗ ∗ 0 1 0 1 0 0A H

∗ ∗ ∗ 0 1 0 1 1 0B H

∗ ∗ ∗ 0 1 1 0 0 0C H

∗ ∗ ∗ 0 1 1 0 1 0D H

∗ ∗ ∗ 0 1 1 1 0 0E H

∗ ∗ ∗ 0 1 1 1 1 0F H

∗ ∗ ∗ 1 0 0 0 0 10 H

∗ ∗ ∗ 1 0 0 0 1 11 H

∗ ∗ ∗ 1 0 0 1 0 12 H

∗ ∗ ∗ 1 0 0 1 1 13 H

∗ ∗ ∗ 1 0 1 0 0 14 H

∗ ∗ ∗ 1 0 1 0 1 15 H

∗ ∗ ∗ 1 0 1 1 0 16 H

∗ ∗ ∗ 1 0 1 1 1 17 H

BIT7

RON

BIT6

BIT5

BIT4

PICTURE

HUE

COLOR

BRIGHT

SHARPNESS

SUB-CONT

SUB-COLOR

SUB-BRIGHT

G-DRIVE

B-DRIVE

G-CUTOFF

GON

BON PICON

V-SIZE

V-POSITION

S-CORR

H-SIZE

PIN-COMP

H-POSITION

UP-CPIN

AFC-BOW

V-ASPECT

V-SCROLL

UP-VLIN

LEFT-BLK

BIT3

BIT2

BIT1

BIT0

C-TRAP VM

DC-TRAN D-PIC

TOT

AXIS

PRE-OVER

D-COL ABL

SHP-F0

CTRAP-ADJ

SUB-HUE

GAMMA

AGING1 AGING2

EY-SW CD-MODE2

B-CUTOFF

VOFF FHHI CD-MODE AKBOFF

V-COMP

AFC-MODE

V-LIN

REF-POSI

VBLKW

PIN-PHASE

LO-CPIN

AFC-ANGLE

ZOOMSW HBLKSW

JMPSW

0

LO-VLIN

RIGHT-BLK

Status Register

BIT7

HLOCK

BIT6

IKR

BIT5

VNG

BIT4

HNG

BIT3

KILLER

BIT2

0

BIT1

1

BIT0

0

Note) EY-SW and CD-MODE2 have been added to the CXA2025S.

– 16 –

Share Link: