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CS8952(2001) Просмотр технического описания (PDF) - Cirrus Logic

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CS8952 Datasheet PDF : 82 Pages
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CS8952
10BASE-T MII RECEIVE TIMING
Parameter
Symbol
Min
Typ
Max
Unit
RX_CLK Period
tP
-
400
RX_CLK Pulse Width
tWL, tWH
-
200
RXD[3:0], RX_ER, RX_DV setup to rising edge of
tSU
30
-
RX_CLK
-
ns
-
ns
-
ns
RXD[3:0], RX_ER, RX_DV hold from rising edge
tHD
30
-
of RX_CLK
-
ns
RX data valid from CRS
tRLAT
-
RX+/- preamble to CRS asserted
tCRS1
-
RX+/- end of packet to CRS de-asserted
tCRS2
RX+/- preamble to COL asserted
tCOL1
0
RX+/- end of packet to COL de-asserted
tCOL2
-
RX_EN asserted to RX_DV, RXD[3:0], RX_ER
tEN
-
valid
8
10
BT
5
7
BT
2.5
3
BT
-
7
BT
-
3
BT
-
60
ns
RX_EN de-asserted to RX_DV, RXD[3:0]. RX_ER
tDIS
-
in high impedance state
-
60
ns
RX+/-
CRS
COL
RX_EN
RX_DV
RXD[3:0],
RX_ER
RX_CLK
tCRS1
tCOL1
tEN
tRLAT
tSU tHD
tWL
tWH
tP
IN
tCRS2
tCOL2
OUT
OUT
tDIS
IN
OUT
OUT
OUT
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
13

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