POWER CONSUMPTION
See (Note 19)
Power Ctl. Registers
02h
03h
CS43L21
Typical Current (mA)
Operation
1 Off (Note 20)
2 Standby (Note 21)
5 Mono Playback
6 Stereo Playback
iVA_HP
iVA
V
x x x x x x x x x x 1.8 0
0
2.5 0
0
x x x x x x 1 x x x 1.8 0
0.01
2.5 0
0.01
1 0 1 1 1 1 0 1 1 1 1.8 1.66 1.40
2.5 2.03 1.71
0 0 1 1 1 1 0 1 1 1 1.8 2.77 2.05
2.5 3.21 2.50
iVD
iVL
Total
(Note 22) Power
(mWrms)
0
0
0
0
0
0
0.02
0
0.05
0.03
0
0.10
2.35
0.01
9.74
3.48
0.02
18.08
2.35
0.01
12.93
3.49
0.02
23.02
19. Unless otherwise noted, test conditions are as follows: All zeros input, slave mode, sample rate =
48 kHz; No load. Digital (VD) and logic (VL) supply current will vary depending on speed mode and mas-
ter/slave operation.
20. RESET pin 25 held LO, all clocks and data lines are held LO.
21. RESET pin 25 held HI, all clocks and data lines are held HI.
22. VL current will slightly increase in master mode.
DS723A1
21