ILX526A
Input Clock Voltage Condition
Item
VIH
VIL
Min.
Typ. Max. Unit
4.5
VDD
5.5
V
0.0
—
0.1
V
∗ This is applied to the all external pulses.
(φCLK, φROG, φSHUT)
φCLK Timing (For all modes)
t1
t2
φCLK
t3
t4
Item
φCLK pulse rise/fall time
φCLK pulse Duty∗1
∗1 100 × t4/ (t3 + t4)
Symbol
t1, t2
—
Min.
Typ. Max. Unit
0
10
100
ns
40
50
60
%
φROG, φCLK Timing
φROG
φCLK
Item
φROG, φCLKpulse timing 1
φROG, φCLKpulse timing 2
φROG pulse rise/fall time
φROG pulse period
Note) τ is the period of φCLK.
t6
t7
t8
t5
t9
Symbol
t5
t9
t6, t8
t7
Min.
Typ. Max. Unit
(1/8) τ (1/4) τ (3/8) τ ns
(1/8) τ (1/4) τ (3/8) τ ns
0
10
100
ns
6τ
10τ
20τ
ns
–6–