UDA1344TS Просмотр технического описания (PDF) - Philips Electronics
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UDA1344TS Datasheet PDF : 28 Pages
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Philips Semiconductors
Low-voltage low-power stereo audio
CODEC with DSP features
Product specification
UDA1344TS
SYSTEM CLOCK FREQUENCY
A 2-bit value to select the used external clock frequency.
Table 16 System clock frequency settings
SC1
SC0
SELECTION
0
0
512fs
0
1
384fs
1
0
256fs
1
1
not used
DATA INPUT FORMAT
A 3-bit value to select the used data format.
Table 17 Data format settings
IF2
IF1
IF0
FORMAT
0
0
0 I2S-bus
0
0
1 LSB-justified 16 bits
0
1
0 LSB-justified 18 bits
0
1
1 LSB-justified 20 bits
1
0
0 MSB-justified
1
0
1 input: LSB-justified 16 bits;
output: MSB-justified
1
1
0 input: LSB-justified 18 bits;
output: MSB-justified
1
1
1 input: LSB-justified 20 bits;
output: MSB-justified
DC FILTER
A 1-bit value to enable the digital DC filter.
Table 18 DC filtering
DC
0
1
SELECTION
no DC filtering
DC filtering
VOLUME CONTROL
A 6-bit value to program the left and right channel volume
attenuation. The range is from 0 to −∞ dB in steps of 1 dB.
Table 19 Volume settings
VC5 VC4 VC3 VC2 VC1 VC0
000000
000001
000010
000011
::::::
111011
111100
111101
111110
111111
VOLUME (dB)
0
0
−1
−2
:
−58
−59
−60
−∞
−∞
BASS BOOST
A 4-bit value to program the bass boost setting. The used
set depends on the mode bits M1 and M0.
Table 20 Bass boost settings
BB3 BB2 BB1 BB0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
BASS BOOST SETTING
FLAT
(dB)
MIN.
(dB)
MAX.
(dB)
0
0
0
0
2
2
0
4
4
0
6
6
0
8
8
0
10
10
0
12
12
0
14
14
0
16
16
0
18
18
0
18
20
0
18
22
0
18
24
0
18
24
0
18
24
0
18
24
2001 Jun 29
14
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