SAA7381 Просмотр технического описания (PDF) - Philips Electronics
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SAA7381 Datasheet PDF : 108 Pages
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Philips Semiconductors
ATAPI CD-R block decoder
Objective specification
SAA7381
Table 5 Generic host controller interface
ATAPI
NAME
GENERIC
INTERFACE
NAME
GENERIC HOST CONTROLLER INTERFACE MEANING
RESET
RESET
controller reset output
DD0 to DD7 D0 to D7
controller DMA path/controller data and control bus (optional)
DD8 to DD15 D8 to D15 controller upper DMA path (optional)
DMARQ
DMACK
DMA acknowledge to controller
DMACK
DMARQ
DMA request from controller
DA1
DBWR
DMA bus write to controller
DA2
DBRD
DMA bus read from controller
CS0
SCSICS
controller chip select output for sub-CPU read/write cycles
Table 6 Miscellaneous pins
SYMBOL
CRIN
CROUT
Iref
POR
TEST1 and TEST2
DESCRIPTION
crystal oscillator/clock input
crystal oscillator output
VCO reference current
power-on reset pin
mode control test pins
COMMENT
−
−
clock PLL multiplier
−
−
Table 7 Sub-CPU interface pins
SYMBOL
SRST
INT
INT2
SCCLK
RD
WR/R/W
ALE
PSEN
SCD0 to SCD7/
SCA0 to SCA7
SCA8 to SCA15
DESCRIPTION
COMMENT
sub-CPU reset
active HIGH reset if XDD7 is pulled LOW during power-on reset;
active LOW reset if XDD7 is pulled HIGH during power-on reset
sub-CPU interrupt request open-drain sub-processor interrupt from host interface
output from host interface
sub-CPU interrupt output
from the SAA7381 drive
block and UART
open-drain sub-processor interrupt from drive and UART
sub-CPU clock out
−
sub-CPU read enable
sub-CPU read enable strobe; if grounded permanently, the WR
signal will act as read/write control input
sub-CPU write enable/
read/write control
write enable; alternative usage is read/write if RD is held LOW at all
times; WR has priority over RD at all times
demultiplex enable input for
lower address lines
while HIGH, the lower address bits are latched from
SCD0 to SCD7; should be used with a Schmitt trigger input to
avoid false latching due to ground bounce on the
8051 microcontroller
program store enable
sub-CPU data bus
multiplexed/low address bus
sub-CPU address high bits
this pin should be tied high using a 10 kΩ resistor
−
−
1997 Aug 12
14
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