ATTINY88 Просмотр технического описания (PDF) - Atmel Corporation
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ATTINY88 Datasheet PDF : 298 Pages
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When the write access time has elapsed, the EEPE bit is cleared by hardware. The user soft-
ware can poll this bit and wait for a zero before writing the next byte. When EEPE has been set,
the CPU is halted for two cycles before the next instruction is executed.
• Bit 0 – EERE: EEPROM Read Enable
The EEPROM Read Enable Signal EERE is the read strobe to the EEPROM. When the correct
address is set up in the EEAR Register, the EERE bit must be written to a logic one to trigger the
EEPROM read. The EEPROM read access takes one instruction, and the requested data is
available immediately. When the EEPROM is read, the CPU is halted for four cycles before the
next instruction is executed.
The user should poll the EEPE bit before starting the read operation. If a write operation is in
progress, it is neither possible to read the EEPROM, nor to change the EEAR Register.
The calibrated oscillator is used to time the EEPROM accesses. Table 5-2 lists the typical pro-
gramming time for EEPROM access from the CPU.
Table 5-2. EEPROM Programming Time
Symbol
Number of Calibrated Oscillator Cycles
EEPROM write
(from CPU)
26,368
Typ Programming Time
3.4 ms
5.5.4 GPIOR2 – General Purpose I/O Register 2
Bit
0x2B (0x4B)
Read/Write
Initial Value
7
6
5
4
3
2
1
0
MSB
LSB
GPIOR2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
This register may be used freely for storing any kind of data.
5.5.5 GPIOR1 – General Purpose I/O Register 1
Bit
0x2A (0x4A)
Read/Write
Initial Value
7
6
5
4
3
2
1
0
MSB
LSB
GPIOR1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
This register may be used freely for storing any kind of data.
5.5.6 GPIOR0 – General Purpose I/O Register 0
Bit
0x1E (0x3E)
Read/Write
Initial Value
7
6
5
4
3
2
1
0
MSB
LSB
GPIOR0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
This register may be used freely for storing any kind of data.
24 ATtiny48/88
8008F–AVR–06/10
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