ATA6621(2006_01) Просмотр технического описания (PDF) - Atmel Corporation

Номер в каталоге

Компоненты Описание

производитель

ATA6621
(Rev.:2006_01)

LIN Transceiver with 5V Regulator and Watchdog

Atmel Corporation 

After ramping up the battery voltage, the 5V regulator is switched on. The reset output NRES

stays low for the time treset (typically 10 ms), then it switches to high and the watchdog waits for

the watchdog sequence from the microcontroller. This lead time td follows after the reset and is

td = 49 ms. In this time, the first watchdog pulse from the microcontroller is required. If the trigger

pulse NTRIG (or PTRIG, as the case may be) occurs during this time, the time t1 starts immedi-

ately. If no trigger signal occurs during the time td, a watchdog reset with tNRES = 1.96 ms will

reset the microcontroller after td = 49 ms. The times t1 and t2 have a fixed relationship with each

other. A triggering signal from the microcontroller is anticipated within the time frame of

t2 = 10.5 ms. To avoid false triggering from glitches, the trigger pulse must be longer than

ttrigg > 3 µs. This slope serves to restart the watchdog sequence. Should the triggering signal fail

in this open window t2, the NRES output will be drawn to ground after t2. A triggering signal dur-

ing the closed window t1 causes NRES to immediately switch low.

Figure 3-8.

VCC = 5V

Timing Sequence with RWD_OSC = 51 kΩ

NRES

Undervoltage Reset

treset = 10 ms

Watchdog Reset

tnres = 1.9 ms

td = 49 ms

t1

t2

t1 = 10 ms t2 = 10.5 ms

twd

NTRIG

PTRIG

ttrigg > 3 µs

3.16.2

Worst Case Calculation with RWO_OSC = 51 kΩ

The internal oscillator has a tolerance of ±20%. This means that t1 and t2 can also vary by ±20%.

The worst case calculation for the watchdog period Twd the microcontroller has to provide is cal-

culated as follows.

The ideal watchdog time Twd is between (t1maximum) and (t1 minimum plus t2 minimum).

t1,min = 0.8 × t1 = 8 ms, t1,max = 1.2 × t1 = 12 ms

t2,min = 0.8 × t2 = 8.4 ms, t2,max = 1.2 × t2 = 12.6 ms

Twdmax = t1min + t2min = 8 ms + 8.4 ms = 16.4 ms

Twdmin = t1max = 12 ms

Twd = 14.2 ms ±2.2 ms (±15%)

A microcontroller with an oscillator tolerance of ±15% is sufficient to supply the trigger inputs

correctly within the time period of Twd = 14.2 ms (±15%) in an application with Rwd_osc = 51 kΩ.

14 ATA6621

4887B–AUTO–01/06

Share Link: