AT89S52-24AC Просмотр технического описания (PDF) - Atmel Corporation

Номер в каталоге

Компоненты Описание

производитель

AT89S52-24AC

8-bit Microcontroller with 8K Bytes In-System Programmable Flash

Atmel Corporation 

AT89S52

Table 24-1. Serial Programming Instruction Set

Instruction

Format

Instruction

Byte 1

Byte 2

1010 1100

0101 0011

Programming Enable

Byte 3

xxxx xxxx

Chip Erase

1010 1100

Read Program Memory

(Byte Mode)

Write Program Memory

(Byte Mode)

Write Lock Bits(1)

Read Lock Bits

0010 0000

0100 0000

1010 1100

0010 0100

Read Signature Bytes

0010 1000

100x xxxx

xxx

xxx

1110 00

xxxx xxxx

xxx

xxxx xxxx

xxxx xxxx

xxxx xxxx

xxx xxx0

Byte 4

xxxx xxxx

0110 1001

(Output on

MISO)

xxxx xxxx

xxxx xxxx

xxx

xx

Signature Byte

Operation

Enable Serial Programming

while RST is high

Chip Erase Flash memory

array

Read data from Program

memory in the byte mode

Write data to Program

memory in the byte mode

Write Lock bits. See Note (1).

Read back current status of

the lock bits (a programmed

lock bit reads back as a “1”)

Read Signature Byte

Read Program Memory 0011 0000

xxx

(Page Mode)

Byte 0

Byte 1...

Byte 255

Read data from Program

memory in the Page Mode

(256 bytes)

Write Program Memory 0101 0000

xxx

(Page Mode)

Byte 0

Byte 1...

Byte 255

Write data to Program

memory in the Page Mode

(256 bytes)

Note:

1. B1 = 0, B2 = 0 ---> Mode 1, no lock protection

B1 = 0, B2 = 1 ---> Mode 2, lock bit 1 activated

B1 = 1, B2 = 0 ---> Mode 3, lock bit 2 activated

B1 = 1, B2 = 1 ---> Mode 4, lock bit 3 activated

} Each of the lock bit modes needs to be activated sequentially

before Mode 4 can be executed.

After Reset signal is high, SCK should be low for at least 64 system clocks before it goes high to

clock in the enable data bytes. No pulsing of Reset signal is necessary. SCK should be no faster

than 1/16 of the system clock at XTAL1.

For Page Read/Write, the data always starts from byte 0 to 255. After the command byte and

upper address byte are latched, each byte thereafter is treated as data until all 256 bytes are

shifted in/out. Then the next instruction will be ready to be decoded.

27

1919C–MICRO–3/05

Share Link: