7.3.4
Preventing Flash Corruption
See “Reset Recommendation to Prevent Flash Corruption” on page 45.
7.4 Registers
Table 6. AUXR1 Register
AUXR1 (S:A2h) – Auxiliary Register 1
7
6
5
4
3
2
-
-
ENBOOT
-
GF3
0
1
0
-
DPS
Bit
Bit Number Mnemonic Description
7-6
-
Reserved
The values read from these Bits are indeterminate. Do not set these Bits.
Enable Boot Flash
5
ENBOOT
Set this bit to map the boot Flash in the code space between at addresses F000h to
FFFFh.
Clear this bit to disable boot Flash.
4
-
Reserved
The values read from this bit is indeterminate. Do not set this bit.
3
GF3
General Flag
This bit is a general-purpose user flag.
2
0
Always Zero
This bit is stuck to logic 0 to allow INC AUXR1 instruction without affecting GF3 flag.
1
-
Reserved for Data Pointer Extension.
Data Pointer Select Bit
0
DPS
Set to select second data pointer: DPTR1.
Clear to select first data pointer: DPTR0.
Reset Value = XXXX 00X0b
7.5
Hardware Bytes
Table 7. HSB Byte – Hardware Security Byte
7
6
5
4
3
X2B
BLJB
-
-
-
2
1
0
LB2
LB1
LB0
Bit
Bit Number Mnemonic Description
X2 Bit
7
X2B(1) Program this bit to start in X2 mode.
Unprogram (erase) this bit to start in standard mode.
Boot Loader Jump Bit
6
BLJB(2) Program this bit to execute the boot loader at address F000h on next reset.
Unprogram (erase) this bit to execute user’s application at address 0000h on next reset.
5-4
-
Reserved
The value read from these bits is always unprogrammed. Do not program these bits.
Reserved
3
-
The value read from this bit is always unprogrammed. Do not program this bit.
20 AT89C5132
4173E–USB–09/07