APW7093NI-TU Просмотр технического описания (PDF) - Anpec Electronics
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APW7093NI-TU Datasheet PDF : 20 Pages
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APW7093
Application Information(Cont.)
Circuit Layout and Grounding (Cont.)
1. Minimize switched-current and high-current ground
loops. Connect the input capacitor’s ground, the
output capacitor’s ground, and P GND close
together. Split the ground connections. Use separate
traces or planes for the PGND and GND and tie them
together at a single point.
2. The output capacitor should be placed close to the
output terminals to obtain better smoothing effect
on the output ripple.
3. Connect the input filter capacitor less than 5mm
away from IN. The connecting copper trace carries
large currents and must be at least 1mm wide,
preferably 2.5mm.
4.Place the LX node components as close together
and as near to the device as possible. This reduces
resistive and switching losses as well as noise.
5.Ground planes are essential for optimum
performance. In most applications, the circuit is
located on a multilayer board and full use of the four
or more layers is recommended. For heat
dissipation, connect the exposed backside pad of
the QFN package to a large analog ground plane,
preferably on a surface of the board that receives
good airflow. If the ground plane is located on the
top layer, make use of the N.C. pins adjacent to
GND to lower thermal resistance to the ground plane.
If the ground is located elsewhere, use several vias
to lower thermal resistance. Typical applications use
multiple ground planes to minimize thermal
resistance. Avoid large AC currents through the
analog ground plane.
Copyright © ANPEC Electronics Corp.
15
Rev. A.5 - Jun., 2005
www.anpec.com.tw
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