AOZ1025D Просмотр технического описания (PDF) - Alpha and Omega Semiconductor
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AOZ1025D Datasheet PDF : 15 Pages
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AOZ1025D
Detailed Description
The AOZ1025D is a current-mode step down regulator
with integrated high-side PMOS switch. It operates from
a 4.75V to 16V input voltage range and supplies up to 8A
of load current. The duty cycle can be adjusted from 6%
to 100% allowing a wide range of output voltage.
Features include enable control, Power-On Reset, input
under voltage lockout, output over voltage protection,
fixed internal soft-start and thermal shut down.
Enable and Soft Start
The AOZ1025D has internal soft start feature to limit
in-rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when the input voltage rises to 4.0V and voltage
on EN pin is HIGH. In soft start process, the output
voltage is ramped to regulation voltage in typically 4ms.
The 4ms soft start time is set internally.
The voltage on EN pin must rise above 1.8V to enable
the AOZ1025D. When voltage on EN pin falls below
0.6V, the AOZ1025D is disabled.
Steady-State Operation
Under steady-state conditions, the converter operates
in fixed frequency and Continuous-Conduction Mode
(CCM).
The AOZ1025D integrates an internal P-MOSFET as the
high-side switch. Inductor current is sensed by amplifying
the voltage drop across the drain to source of the high
side power MOSFET. Output voltage is divided down by
the external voltage divider at the FB pin. The difference
of the FB pin voltage and reference is amplified by the
internal transconductance error amplifier. The error
voltage, which shows on the COMP pin, is compared
against the current signal, which is sum of inductor
current signal and ramp compensation signal, at PWM
comparator input. If the current signal is less than the
error voltage, the internal high-side switch is on. The
inductor current flows from the input through the inductor
to the output. When the current signal exceeds the error
voltage, the high-side switch is off. The inductor current is
freewheeling through the external low-side N-MOSFET
switch to output. The internal adaptive FET driver
guarantees no turn on overlap of both high-side and
low-side switch.
The AOZ1025D uses an external freewheeling
NMOSFET to realize synchronous rectification. It greatly
improves the converter efficiency and reduces power
loss in the low-side switch.
The AOZ1025D uses a P-Channel MOSFET as the
high-side switch. It saves the bootstrap capacitor
normally seen in a circuit which is using an NMOS
switch.
Switching Frequency
The AOZ1025D switching frequency is fixed and set by
an internal oscillator. The practical switching frequency
could range from 350 kHz to 600 kHz due to device
variation.
Output Voltage Programming
Output voltage can be set by feeding back the output to
the FB pin by using a resistor divider network. In the
application circuit shown in Figure 1. The resistor divider
network includes R1 and R2. Usually, a design is started
by picking a fixed R2 value and calculating the required
R1 with equation:
VO
=
0.8
1
+
R-R----12-
Some standard value of R1, R2 and most used output
voltage values are listed in Table 1.
Table 1.
VO (V)
0.8
1.2
1.5
1.8
2.5
3.3
5.0
R1 (kΩ)
1.0
4.99
10
12.7
21.5
31.6
52.3
R2 (kΩ)
Open
10
11.5
10.2
10
10
10
The combination of R1 and R2 should be large enough to
avoid drawing excessive current from the output, which
will cause power loss.
Rev. 1.4 June 2012
www.aosmd.com
Page 7 of 15
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