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AN18208A

Tuner IC for home-audio stereo set

Panasonic Corporation 

AN18208A

„ Electrical Characteristics(Reference values for design)(continued)at VCC1 = 9 V, VCC = 10 V

Notes) Ta = 25°C±2°C unless otherwise specified.

The characteristics listed below are reference values derived from the design of the IC and are not guaranteed by inspection.

If a problem does occur related to these characteristics, we will respond in good faith to user concerns.

B

No.

Parameter

Symbol

Conditions

Reference values

Unit Notes

Min Typ Max

I2C Interface (Fast-mode)

38 Hysteresis of Schmitt trigger inputs 1

Vhys1 5 V mode Pin 13 : GND

0.25 — — V *2

39 Hysteresis of Schmitt trigger inputs 1

Vhys2 3 V mode Pin 13 : OPEN

0.15 — — V

*2

40 Output fall time from VIHmin to VILmax

Tof

Bus capacitance : 10 pF to

400 pF

Ip < 6 mA

20 +

0.1×Cb

—

250

ns

*2

41

Pulse width of spikes which must be

suppressed by the input filter

tSP

—

0

— 50 ns *2

42 Capacitance for each I/O pin

Ci

Bus capacitance : 10 pF to

400 pF

—

— 10 pF *2

43 Hold time (repeated)

44 Low period of the SCL clock

45 High period of the SCL clock

46 Set-up time for a repeat START condition

47 Data hold time

48 Data set-up time

tHD:STA

tLOW

tHIGH

tSU:STA

tHD:DAT

tSU:DAT

The first clock pulse is

generated after tHD:STA

—

—

—

—

—

49 Rise time of both SDA and SCL signals

tr

—

50 Fall time of both SDA and SCL signals

tf

—

51 Set-up time of STOP condition

tSU:STO

—

52

Bus free time between a STOP and

START condition

tBUF

—

0.6

— — μs *2

1.3

— — μs *2

0.6

— — μs *2

0.6

— — μs *2

0

— 0.9 μs *2

100 — — ns *2

20 +

0.1×Cb

—

300

ns

*2

20 +

0.1×Cb —

300

ns

*2

0.6

— — μs *2

1.3

— — μs *2

53 Capacitive load for each bus line

Cb

—

—

— 400 pF *2

SDC00079AEB

12

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