CXB1583Q
2. ECL input circuit
The ECL differential input pins are biased to VBB (VCC – 1.3 V) via an 18kΩ resistor in the IC. See the figures
below for ECL differential input methods.
VCC = 3.3V, VEE = GND
VCC = 3.3V
VCC = 3.3V, VEE = GND
18kΩ
VBB (VCC – 1.3V)
82Ω
82Ω
3.3V ECL output buffer
18kΩ
ECL differential input buffer
(a) ECL differrential signal from 3.3V ECL output buffer
VCC = GND, VEE = –4.5V
0.01µF
VCC = 3.3V, VEE = GND
18kΩ
VBB (VCC – 1.3V)
ECL100K output buffer
330Ω
0.01µF
330Ω
VEE
18kΩ
ECL differential input buffer
(b) ECL differrential signal from ECL 100K output buffer
50Ω
TRANS.
LINE
0.01µF
VCC = 3.3V, VEE = GND
18kΩ
VBB (VCC – 1.3V)
0.01µF
18kΩ
50Ω
50Ω
VTT (VCC – 2V)
ECL differential input buffer
(c) ECL differrential signal from 50Ω transmission line
50W
TRANS.
LINE
0.01µF
50Ω
0.01µF
VTT (VCC – 2V)
VCC = 3.3V, VEE = GND
18kΩ
VBB (VCC – 1.3V)
18kΩ
ECL differential input buffer
(d) ECL single signal from 50Ω transmission line
Fig. 2. ECL Input Circuits
– 17 –