DS1820 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS1820

1–Wire™ Digital Thermometer

Dallas Semiconductor -> Maxim Integrated 

DS1820

Read ROM [33h]

This command allows the bus master to read the

DS1820’s 8–bit family code, unique 48–bit serial num-

ber, and 8–bit CRC. This command can only be used if

there is a single DS1820 on the bus. If more than one

slave is present on the bus, a data collision will occur

when all slaves try to transmit at the same time (open

drain will produce a wired AND result).

Match ROM [55h]

The match ROM command, followed by a 64–bit ROM

sequence, allows the bus master to address a specific

DS1820 on a multidrop bus. Only the DS1820 that

exactly matches the 64–bit ROM sequence will respond

to the following memory function command. All slaves

that do not match the 64–bit ROM sequence will wait for

a reset pulse. This command can be used with a single

or multiple devices on the bus.

Skip ROM [CCh]

This command can save time in a single drop bus sys-

tem by allowing the bus master to access the memory

functions without providing the 64–bit ROM code. If

more than one slave is present on the bus and a read

command is issued following the Skip ROM command,

data collision will occur on the bus as multiple slaves

transmit simultaneously (open drain pulldowns will pro-

duce a wired AND result).

Search ROM [F0h]

When a system is initially brought up, the bus master

might not know the number of devices on the 1–Wire

bus or their 64–bit ROM codes. The search ROM com-

mand allows the bus master to use a process of elimina-

tion to identify the 64–bit ROM codes of all slave devices

on the bus.

Alarm Search [ECh]

The flowchart of this command is identical to the Search

ROM command. However, the DS1820 will respond to

this command only if an alarm condition has been

encountered at the last temperature measurement. An

alarm condition is defined as a temperature higher than

TH or lower than TL. The alarm condition remains set as

long as the DS1820 is powered up, or until another tem-

perature measurement reveals a non–alarming value.

For alarming, the trigger values stored in EEPROM are

taken into account. If an alarm condition exists and the

TH or TL settings are changed, another temperature

conversion should be done to validate any alarm condi-

tions.

Example of a ROM Search

The ROM search process is the repetition of a simple

3–step routine: read a bit, read the complement of the

bit, then write the desired value of that bit. The bus mas-

ter performs this simple, 3–step routine on each bit of

the ROM. After one complete pass, the bus master

knows the contents of the ROM in one device. The

remaining number of devices and their ROM codes may

be identified by additional passes.

The following example of the ROM search process

assumes four different devices are connected to the

same 1–Wire bus. The ROM data of the four devices is

as shown:

ROM1

ROM2

ROM3

ROM4

00110101...

10101010...

11110101...

00010001...

The search process is as follows:

1. The bus master begins the initialization sequence by

issuing a reset pulse. The slave devices respond by

issuing simultaneous presence pulses.

2. The bus master will then issue the Search ROM

command on the 1–Wire bus.

3. The bus master reads a bit from the 1–Wire bus.

Each device will respond by placing the value of the

first bit of their respective ROM data onto the 1–Wire

bus. ROM1 and ROM4 will place a 0 onto the

1–Wire bus, i.e., pull it low. ROM2 and ROM3 will

place a 1 onto the 1–Wire bus by allowing the line to

stay high. The result is the logical AND of all devices

on the line, therefore the bus master sees a 0. The

bus master reads another bit. Since the Search

ROM data command is being executed, all of the

devices on the 1–Wire bus respond to this second

read by placing the complement of the first bit of their

respective ROM data onto the 1–Wire bus. ROM1

and ROM4 will place a 1 onto the 1–Wire, allowing

the line to stay high. ROM2 and ROM3 will place a

0 onto the 1–Wire, thus it will be pulled low. The bus

master again observes a 0 for the complement of the

first ROM data bit. The bus master has determined

that there are some devices on the 1–Wire bus that

have a 0 in the first position and others that have a 1.

030598 10/27

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