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ADV7179BCP-REEL Просмотр технического описания (PDF) - Analog Devices

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ADV7179BCP-REEL Datasheet PDF : 52 Pages
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ADV7174/ADV7179
Mode 3: Master/Slave Option HSYNC, BLANK, FIELD
(Timing Register 0 TR0 = X X X X X 1 1 0 or X X X X X 1 1 1)
In this mode, the ADV7174/ADV7179 accepts or generates
horizontal SYNC and odd/even FIELD signals. A transition of
the FIELD input when HSYNC is high indicates a new frame,
DISPLAY
that is, vertical retrace. The BLANK signal is optional. When
the BLANK input is disabled, the ADV7174/ADV7179
automatically blanks all normally blank lines as per CCIR-624.
Mode 3 is illustrated in Figure 31 (NTSC) and Figure 32 (PAL).
VERTICAL BLANK
DISPLAY
522 523 524 525
1
HSYNC
BLANK
2
3
4
5
6
7
FIELD
EVEN FIELD ODD FIELD
8
9
10
11
DISPLAY
VERTICAL BLANK
20
21
22
DISPLAY
260 261 262 263 264 265 266 267 268 269 270 271 272 273 274
HSYNC
BLANK
FIELD
DISPLAY
ODD FIELD EVEN FIELD
Figure 31. Timing Mode 3 (NTSC)
VERTICAL BLANK
283 284 285
DISPLAY
622
623
624
625
1
2
3
4
5
6
7
HSYNC
BLANK
FIELD
EVEN FIELD ODD FIELD
DISPLAY
VERTICAL BLANK
21
22
23
DISPLAY
309
310
311
312
313
314
315
316
317
318
319
320
HSYNC
BLANK
FIELD
ODD FIELD EVEN FIELD
Figure 32. Timing Mode 3 (PAL)
Rev. B | Page 24 of 52
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