ADN2860(RevB) Просмотр технического описания (PDF) - Analog Devices
Номер в каталоге
Компоненты Описание
производитель
ADN2860 Datasheet PDF : 20 Pages
| |||
ADN2860
USING ADDITIONAL INTERNAL
NONVOLATILE EEPROM
The ADN2860 contains additional internal user EEPROM for
saving constants and other data. The user EEPROM I2C data-
word follows the same format as the general-purpose EEPROM
memory shown in Figure 19 and Figure 20. User EEPROM
memory addresses are shown in Table 6.
To support the use of multiple EEPROM modules on a single
I2C bus, the ADN2860 features two external addressing pins,
Pins 21 and 22 (A1_EE and A0_EE), to manually set the address
of the EEPROM included with the ADN2860. This feature
ensures that the correct EEPROM memory is accessed when
using multiple memory modules on a single I2C bus.
DIGITAL INPUT/OUTPUT CONFIGURATION
All digital inputs are ESD protected. Digital inputs are high
impedance and can be driven directly from most digital
sources. The RESET digital input pin does not have an internal
pull-up resistor. Therefore, the user should place a pull-up
resistor from RESET to VDD if the function is not used. The
WP pin has an internal pull-down resistor. If not driven by an
external source, the ADN2860 defaults to a write-protected
state. ESD protection of the digital inputs is shown in Figure 27.
VDD
INPUTS
WP
GND
Figure 27. Equivalent WP ESD Protection
MULTIPLE DEVICES ON ONE BUS
Figure 28 shows four ADN2860 devices on the same serial bus.
Each has a different slave address because the state of their AD0
and AD1 pins are different. This allows independent reading
and writing to each RDAC within each device.
+5V
RP
RP
MASTER
SDA
SCL
VDD
VDD
VDD
SDA SCL
SDA SCL
SDA SCL
SDA SCL
AD1
AD1
AD1
AD1
AD0
AD0
AD0
AD0
Figure 28. Multiple ADN2860 Devices on a Single Bus
LEVEL SHIFT FOR BIDIRECTIONAL
COMMUNICATION
While most legacy systems operate at one voltage, adding a new
component might require a different voltage. When two
systems transmit the same signal at two different voltages, use a
level shifter to allow the systems to communicate.
For example, a 3.3 V microcontroller (MCU) can be used along
with a 5 V digital potentiometer. A level shifter is required to
enable bidirectional communication.
Figure 29 shows one of many possible techniques to properly
level-shift signals between two devices. M1 and M2 are
N-channel FETs (2N7002). If VDD falls below 2.5 V, use low
threshold N-channel FETs (FDV301N) for M1 and M2.
VDD1 = 3.3V
VDD2 = 5V
SDA1
SCL1
RP
RP
RP
RP
G
S
D
G
M1 S
D
M2
SDA2
SCL2
3.3V
MCU
5V
ADN2860
Figure 29. Level Shifting for Different Voltage Devices on an I2C Bus
TERMINAL VOLTAGE OPERATION RANGE
The ADN2860 positive VDD and negative VSS power supply
inputs define the boundary conditions for proper 2-terminal
programmable resistance operation. Supply signals on
Terminals W and B that exceed VDD or VSS are clamped by the
internal forward-biased diodes of the ADN2860.
VDD
A
W
B
VSS
Figure 30. Maximum Terminal Voltages Set by VDD and VSS
The ground pin of the ADN2860 is used as a digital ground
reference and needs to be tied to the common ground of the
PCB. Reference the digital input control signals to the
ADN2860 ground pin and satisfy the logic levels defined in
Table 1 and Table 2.
Rev. B | Page 16 of 20
Share Link: 