ADN2804 Просмотр технического описания (PDF) - Analog Devices

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ADN2804

622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier

Analog Devices 

ADN2804

Data Sheet

OUTLINE DIMENSIONS

PIN 1

INDICATOR

0.80

0.75

0.70

SEATING

PLANE

5.10

5.00 SQ

4.90

TOP VIEW

0.50

BSC

0.30

0.25

0.18

25

32

24

1

EXPOSED

PAD

PIN 1

INDICATOR

3.25

3.10 SQ

2.95

17

8

0.50

16

9

0.25 MIN

0.40

BOTTOM VIEW

0.30

0.05 MAX

0.02 NOM

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

SECTION OF THIS DATA SHEET.

COPLANARITY

0.08

0.20 REF

ORDERING GUIDE

Model1

ADN2804ACPZ

ADN2804ACPZ-500RL7

ADN2804ACPZ-RL7

EVAL-ADN2804EBZ

1 Z = RoHS Compliant Part.

COMPLIANT TO JEDEC STANDARDS MO-220-WHHD.

Figure 30. 32-Lead Frame Chip Scale Package [LFCSP_WQ]

5 mm × 5 mm Body, Very Very Thin Quad

(CP-32-7)

Dimensions shown in millimeters

Temperature Range

−40°C to +85°C

−40°C to +85°C

−40°C to +85°C

Package Description

32-Lead LFCSP_WQ

32-Lead LFCSP_WQ, 7”Tape-Reel, 500 Pieces

32-Lead LFCSP_WQ, 7”Tape-Reel, 1500 Pieces

Evaluation Board

Package Option

CP-32-7

CP-32-7

CP-32-7

I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).

©2006–2014 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.

D05801-0-4/14(D)

Rev. D | Page 24 of 24

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