ADD8733
Preliminary Technical Data
STEP-DOWN REGULATOR SPECIFICATIONS
VVIN = VSD_VIN = 12 V, L2=10 μH, TA = 25°C, fOSC = 650 kHz, unless otherwise noted.
Table 2.
Parameter
SUPPLY
Input Voltage
Minimum Duty Cycle
OUTPUT
Output Voltage
Load Regulation
Line Regulation
Overall Regulation
ERROR AMPLIFER
FB Regulation Voltage
FB Input Bias Current
Error Amplifier Open-Loop Voltage Gain
COMP Output Current
SWITCH
On Resistance
Peak Current Limit
OSCILLATOR
Oscillator Frequency
Symbol Conditions
VSD_VIN
VSTEP_DN
500 mA ≤ ILOAD ≤ 1000 mA, VSTEP_DN = 3.3 V
ILOAD = 750 mA, 8 V ≤ VSD_VIN ≤ 16.5 V, VSTEP_DN = 3.3 V
Line, load, temperature
VSD_FB
ISD_FB
AVSD
ISD_COMP
RDS (ON)SD
ISDCLSET
SD_BS = 5 V, ISD_LOAD = 750 mA
fOSC
FREQ = GND
FREQ = VSR_OUT1
1 VSR_OUT pin provides a logic-high output of 5 V.
Min Typ Max Unit
8.0
15
16.5 V
%
2.5
1
1
5
V
%
%
±3 %
2.5
V
TBD
nA
TBD
V/V
TBD
μA
100
mΩ
3
A
650
kHz
1200
kHz
Rev. PrA | Page 4 of 16