RTL8139CL Просмотр технического описания (PDF) - Realtek Semiconductor

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производитель

RTL8139CL

REALTEK 3.3V SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT

Realtek Semiconductor 

00D8h

R/W

00D9h-00EFh

-

00F0h-00F3h

R/W

00F4h-00F7h

R/W

00F8h-00FBh

R

00FCh-00FFh

W

Config5

-

FER

FEMR

FPSR

FFER

RTL8139C(L)

Configuration Register 5

Reserved

Function Event Register (Cardbus only)

Function Event Mask Register (CardBus only)

Function Present State Register (CardBus only)

Function Force Event Register (CardBus only)

6.1 Receive Status Register in Rx packet header

Bit

R/W

Symbol

Description

15

R

MAR

Multicast Address Received: This bit set to 1 indicates that a multicast

packet is received.

14

R

PAM

Physical Address Matched: This bit set to 1 indicates that the destination

address of this packet matches the value written in ID registers.

13

R

BAR

Broadcast Address Received: This bit set to 1 indicates that a broadcast

packet is received. BAR, MAR bit will not be set simultaneously.

12-6

-

-

Reserved

5

R

ISE

Invalid Symbol Error: (100BASE-TX only) This bit set to 1 indicates

that an invalid symbol was encountered during the reception of this packet.

4

R

RUNT

Runt Packet Received: This bit set to 1 indicates that the received packet

length is smaller than 64 bytes ( i.e. media header + data + CRC < 64

bytes )

3

R

LONG

Long Packet: This bit set to 1 indicates that the size of the received

packet exceeds 4k bytes.

2

R

CRC

CRC Error: When set, indicates that a CRC error occurred on the

received packet.

1

R

FAE

Frame Alignment Error: When set, indicates that a frame alignment

error occurred on this received packet.

0

R

ROK

Receive OK: When set, indicates that a good packet is received.

2002/01/10

12

Rev.1.4

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