AD9398 Просмотр технического описания (PDF) - Analog Devices
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AD9398 Datasheet PDF : 44 Pages
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AD9398
Parameter
POWER SUPPLY
VD Supply Voltage
VDD Supply Voltage
DVDD Supply Voltage
PVDD Supply Voltage
IVD Supply Current (Typical Pattern)1
IVDD Supply Current (Typical Pattern)2
IDVDD Supply Current (Typical Pattern)1,
4
IPVDD Supply Current (Typical Pattern)
Power-Down Supply Current (IPD)
AC SPECIFICATIONS
Intrapair (+ to −) Differential Input
Skew (TDPS)
Channel to Channel Differential Input
Skew (TCCS)
Low-to-High Transition Time for Data
and Controls (DLHT)
Low-to-High Transition Time for
DATACK (DLHT)
High-to-Low Transition Time for Data
and Controls (DHLT)
High-to-Low Transition Time for
DATACK (DHLT)
Clock-to-Data Skew5 (TSKEW)
Duty Cycle, DATACK
DATACK Frequency (FCIP)
Test Level Conditions
AD9398KSTZ-100
Min
Typ Max
IV
3.15
3.3 3.47
IV
1.7
3.3 347
IV
1.7
1.8 1.9
IV
1.7
1.8 1.9
V
80 100
V
40 1003
V
88 110
V
26 35
VI
130
IV
IV
IV
Output drive = high;
CL = 10 pF
IV
Output drive = low;
CL = 5 pF
IV
Output drive = high;
CL = 10 pF
IV
Output drive = low;
CL = 5 pF
IV
Output drive = high;
CL = 10 pF
IV
Output drive = low;
CL = 5 pF
IV
Output drive = high;
CL = 10 pF
IV
Output drive = low;
CL = 5 pF
IV
−0.5
2.0
IV
45
50
VI
20
1 The typical pattern contains a gray scale area, output drive = high. Worst-case pattern is alternating black and white pixels.
2 The typical pattern contains a gray scale area, output drive = high.
3 Specified current and power values with a worst-case pattern (on/off).
4 DATACK load = 10 pF, data load = 5 pF.
5 Drive strength = high.
AD9398KSTZ-150
Min Typ Max Unit
3.15 3.3 3.47 V
1.7 3.3 347 V
1.7 1.8 1.9 V
1.7 1.8 1.9 V
80 110 mA
55 1751 mA
110 145 mA
30 40 mA
130
mA
360 ps
6
Clock
period
900 ps
1300 ps
650 ps
1200 ps
850 ps
1250 ps
800 ps
1200 ps
−0.5
2.0 ns
55 %
150 MHz
Rev. 0 | Page 4 of 44
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