AD7303 Просмотр технического описания (PDF) - Analog Devices

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Компоненты Описание

производитель

AD7303

+2.7 V to +5.5 V, Serial Input, Dual Voltage Output 8-Bit DAC

Analog Devices 

*

*

*

UPDATE

*

LDAA

LDAA

STAA

BSR

JMP

PSHX

PSHY

PSHA

LDAA

STAA

*

*

TRANSFER

*

WAIT

LDAA

STAA

LDX

LDY

BCLR

LDAA

STAA

LDAA

BPL

*

INX

CPX

BNE

*Execute instruction

BSET

PULA

PULY

PULX

RTS

#$18

#$53

SPCR

UPDATE

#$E000

0, 0, 0, 1, 1, 0, 0, 0

SCLK and DIN enabled as outputs

AD7303

SPI on, Master mode, CPOL=0, CPHA=0, Clock rate =E/32

Update AD7303 output.

Restart.

Save relevant registers.

#$00

DIN 1

#$AA

DIN 2

Control Word "0, 0, 0, 0, 0, 0, 0, 0"

Load both DAC A and DAC B DAC registers from shift register

with internal reference selected.

Data Word "1, 0, 1, 0, 1, 0, 1, 0"

#DIN1

#$1000

Stack pointer at first first byte to send via DIN 1.

Stack pointer at on chip registers.

PORTC,Y $80

0,X

SPDR

Assert SYNC.

Get BYTE to transfer via SPI.

Write to DIN register to start transfer.

SPSR

WAIT

#DIN 2+1

TRANSFER

Wait for SPIF to be set to indicate that transfer has been completed.

SPIF is the MSB of the SPCR. SPIF is automatically reset if in a set

state when the status register is read.

Increment counter for transfer of second byte.

16 bits transferred?

If not, transfer second BYTE.

PORTC,Y $80

Bring SYNC back high.

Restore registers.

Return to main program.

REV. 0

–15–

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