AD6653 Просмотр технического описания (PDF) - Analog Devices
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AD6653 Datasheet PDF : 80 Pages
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AD6653
DRVDD 1
DNC 2
DNC 3
D0– (LSB) 4
D0+ (LSB) 5
D1– 6
D1+ 7
D2– 8
D2+ 9
DCO– 10
DCO+ 11
D3– 12
D3+ 13
D4– 14
D4+ 15
D5– 16
DNC = DO NOT CONNECT
PIN 1
INDICATOR
EXPOSED PADDLE, PIN 0
(BOTTOM OF PACKAGE)
AD6653
PARALLEL LVDS
TOP VIEW
(Not to Scale)
48 SCLK/DFS
47 SDIO/DCS
46 AVDD
45 AVDD
44 VIN+B
43 VIN–B
42 RBIAS
41 CML
40 SENSE
39 VREF
38 VIN–A
37 VIN+A
36 AVDD
35 SMI SDFS
34 SMI SCLK/PDWN
33 SMI SDO/OEB
Figure 10. LFCSP Interleaved Parallel LVDS Pin Configuration (Top View)
Table 9. Pin Function Descriptions (Interleaved Parallel LVDS Mode)
Pin No.
Mnemonic
Type
Description
ADC Power Supplies
20, 64
DRGND
Ground
Digital Output Ground.
1, 21
DRVDD
Supply
Digital Output Driver Supply (1.8 V to 3.3 V).
24, 57
DVDD
Supply
Digital Power Supply (1.8 V Nominal).
36, 45, 46
AVDD
Supply
Analog Power Supply (1.8 V Nominal).
0
AGND
Ground
Analog Ground. Pin 0 is the exposed thermal pad on the bottom of the package.
2, 3, 62, 63 DNC
Do Not Connect.
ADC Analog
37
VIN+A
Input
Differential Analog Input Pin (+) for Channel A.
38
VIN−A
Input
Differential Analog Input Pin (−) for Channel A.
44
VIN+B
Input
Differential Analog Input Pin (+) for Channel B.
43
VIN−B
Input
Differential Analog Input Pin (−) for Channel B.
39
VREF
Input/Output Voltage Reference Input/Output.
40
SENSE
Input
Voltage Reference Mode Select. See Table 11 for details.
42
RBIAS
Input/Output External Reference Bias Resistor.
41
CML
Output
Common-Mode Level Bias Output for Analog Inputs.
49
CLK+
Input
ADC Clock Input—True.
50
CLK−
Input
ADC Clock Input—Complement.
ADC Fast Detect Outputs
54
FD0+
Output
Channel A/Channel B LVDS Fast Detect Indicator 0—True. See Table 17 for details.
53
FD0−
Output
Channel A/Channel B LVDS Fast Detect Indicator 0—Complement. See Table 17
for details.
56
FD1+
Output
Channel A/Channel B LVDS Fast Detect Indicator 1—True. See Table 17 for details.
55
FD1−
Output
Channel A/Channel B LVDS Fast Detect Indicator 1—Complement. See Table 17
for details.
59
FD2+
Output
Channel A/Channel B LVDS Fast Detect Indicator 2—True. See Table 17 for details.
58
FD2−
Output
Channel A/Channel B LVDS Fast Detect Indicator 2—Complement. See Table 17
for details.
61
FD3+
Output
Channel A/Channel B LVDS Fast Detect Indicator 3—True. See Table 17 for details.
60
FD3−
Output
Channel A/Channel B LVDS Fast Detect Indicator 3—Complement. See Table 17
for details.
Rev. 0 | Page 16 of 80
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