LTC1094A Просмотр технического описания (PDF) - Linear Technology

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LTC1094A

1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems

Linear Technology 

LTC1091/LTC1092

LTC1093/LTC1094

APPLICATI S I FOR ATIO

Motorola SPI (MC68HC05C4, MC68HC11)

The MC68HC05C4 has been chosen as an example of an

MPU with a dedicated serial port. This MPU transfers data

MSB first and in 8-bit increments. With two 8-bit transfers,

the A/D result is read into the MPU. The first 8-bit transfer

sends the DIN word to the LTC1091 and clocks B9 and B8

of the A/D conversion result into the processor. The

second 8-bit transfer clocks the remaining bits, B7 through

B0, into the MPU.

ANDing the first MPU received byte with 03 Hex clears the

six most significant bits. Notice how the position of the

start bit in the first MPU transmit word is used to position

the A/D result right justified in two memory locations.

MPU TRANSMIT

WORD

CS

DIN

Data Exchange Between LTC1091 and MC68HC05C4

START

BIT

BYTE 1

BYTE 2 (DUMMY)

0

1

SGL/

DIFF

ODD/

SIGN

MSBF

X

X

X

X X X X XX X X

X = DON’T CARE

START

SGL/ ODD/

DIFF SIGN MSBF

DON’T CARE

CLK

DOUT

MPU RECEIVED

WORD

B9 B8

BYTE 1

? ? ? ? ? 0 B9 B8

1ST TRANSFER

B7 B6 B5 B4 B3 B2 B1 B0

BYTE 2

B7 B6 B5 B4 B3 B2 B1 B0

2ND TRANSFER

1091/2/3/4 AI15

Hardware and Software Interface to

Motorola MC68HC05C4 Processor

ANALOG

INPUTS

CS

LTC1091 CLK

DIN

DOUT

CO

SCK

MC68HC05C4

MOSI

MISO

1091-4 AI16

DOUT from LTC1091 Stored in MC68HC05C4 RAM

MSB

LOCATION A 0 0 0 0 0 0 B9 B8 BYTE 1

LSB

LOCATION A + 1 B7 B6 B5 B4 B3 B2 B1 B0 BYTE 2

LABEL

START

MNEMONIC

BCLRn

LDA

STA

TST

BPL

LDA

STA

AND

STA

TST

BPL

BSETn

LDA

STA

COMMENTS

Bit 0 Port C Goes Low (CS Goes Low)

Load LTC1090 DIN Word into Acc

Load LTC1090 DIN Word into SPI from Acc

Transfer Begins

Test Status of SPIF

Loop to Previous Instruction If Not Done

with Transfer

Load contents of SPI Data Register into

Acc (DOUT MSBs)

Start Next SPI Cycle

Clear 6 MSBs of First DOUT Word

Store in Memory Location A (MSBs)

Test Status of SPIF

Loop to Previous Instruction If Not Done

with Transfer

Set B0 of Port C (CS Goes High)

Load contents of SPI Data Register into

Acc (DOUT LSBs)

Store in Memory location A + 1 (LSBs)

18

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