74LV4060 Просмотр технического описания (PDF) - Philips Electronics

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74LV4060

14-stage binary ripple counter with oscillator

Philips Electronics 

Philips Semiconductors

14-stage binary ripple counter with oscillator

Product specification

74LV4060

MR (from logic)

11 RS

Rbias

100 kW to 1 MW

RTC

10

R2

2.2 kW

22 to

C3

37 pF

C2

100 pF

VI

MR INPUT

GND

VI

RS INPUT

GND

VCC

Qn OUTPUT

GND

VM

tW

tPHL

trem

VM

VM

SV00329

Figure 7.

Waveforms showing the master reset (MR) pulse width, the master

reset to output (Qn) propagation delays and the master reset to

clock (RS) removal time.

SV00326

Figure 5. External components connection for

a typical crystal oscillator

R2 is the power limiting resistor. For starting and maintaining

oscillation, a minimum transconductance is necessary, so R2 should

not be too large. A practical value for R2 is 2.2 kW.

VI

CP INPUT VM

GND

VOH

Qn OUTPUT

VOL

tPHL

1/fmax

tW

VM

tPLH

SV00322

Figure 6.

Waveforms showing the clock (RS) to output (Q3) propagation

delays, the clock pulse width, the output transition times and the

maximum clock frequency.

VOH

Qn OUTPUT

VOL

VOH

Qn+1 OUTPUT

VOL

VM

tPLH

VM

tPHL

SV00327

Figure 8.

Waveforms showing the output Qn to output n + 1 propagation

delays.

NOTES:

1. VM = 1.5 V at VCC > 2.7 V and < 3.6 V

VM = 0.5 . VCC at VCC < 2.7 V and > 4.5 V.

2. VOL and VOH are the typical output voltage drop that occur with

the output load.

1998 Jun 23

12

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