RTL8208 Просмотр технического описания (PDF) - Realtek Semiconductor

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RTL8208

REALTEK SINGLE CHIP OCTAL 10/100 MBPS FAST ETHERNET TRANSCEIVER

Realtek Semiconductor 

RTL8208

6.5 Register4: Auto-Negotiation Advertisement

This register contains the advertisement abilities of this device as they will be transmitted to its Link Partner during

Auto-negotiation.

Reg. bit Name

Description

Mode Default

4.15

Next Page

1=Next Page enabled.

RO

0

0=Next Page disabled. (Permanently =0)

4.14

Acknowledge

Permanently =0.

RO

0

4.13

Remote Fault

1=Advertises that RTL8208 has detected a remote fault. RW

0

0=No remote fault detected.

4.[12:11] Reserved

RO

0

4.10

Pause

1=Advertises that the RTL8208 has flow control capability. RW

Set by

0=Without flow control capability.

TP_PAUSE

In 100FX mode, this bit is set by 100FX_PAUSE upon reset.

Or

In 100/10TP mode, this bit is set by TP_PAUSE upon reset.

FX_PAUSE

4.9

100Base-T4

1 = 100Base-T4 capable.

RO

0

0 = Not 100Base-T4 capable. (Permanently =0)

4.8

100Base-TX-FD

1=100Base-TX full duplex capable.

RW

1

0=Not 100Base-TX full duplex capable.

4.7

100Base-TX

1=100Base-TX half duplex capable.

RW

1

0=Not 100Base-TX half duplex capable.

4.6

10Base-T-FD

1=10Base-TX full duplex capable.

RW

1

0=Not 10Base-TX full duplex capable.

4.5

10Base-T

1=10Base-TX half duplex capable.

RW

1

0=Not 10Base-TX half duplex capable.

4.[4:0]

Selector Field

[00001]=IEEE802.3

RO

00001

Next Page – The RTL8208 does not implement the Next Page function, so bit 15 will always return a ‘0’ when read.

Acknowledge – Because the Next Page function is not implemented, bit 14 will always return a ‘0’ when read.

Remote Fault – When RTL8208 can not receive valid signal , set Reg4.13=1. The RTL8208 advertises this information to

inform link partner.

Reserved – Ignore the output of the RTL8208 when these bits are read.

Pause –Setting this bit indicates the availability of Flow Control capabilities when full duplex operation is in use. This bit is used

by one MAC to communicate Pause Capability to its Link Partner and has no effect on PHY operation.

100Base-T4 – Because the RTL8208 does not support the T4 function, any reads to this bit will return a ‘0’.

100Base-TX-FD – This bit advertises the ability to the Link Partner that the RTL8208 can operate in 100Base-TX full duplex

mode. Writing a ‘0’ to this bit will suppress the transmission of this ability to the Link Partner. Resetting the chip will restore the

default value. The default value is ‘1’ and writing a ‘1’ will set this bit to ‘1’. Reading this bit will return the last written value or

the default value if no write has been completed since the last reset.

100Base-TX – This bit advertises the ability to the Link Partner that the RTL8208 can operate in 100Base-TX half duplex mode.

Writing a ‘0’ to this bit will suppress the transmission of this ability to the Link Partner. Resetting the chip will restore the default

value. The default value is ‘1’ and writing a ‘1’ will set this bit to ‘1’. Reading this bit will return the last written value or the

default value if no write has been completed since the last reset.

10Base-T-FD – This bit advertises the ability to the Link Partner that the RTL8208 can operate in 10Base-T full duplex mode.

Writing a ‘0’ to this bit will suppress the transmission of this ability to the Link Partner. Resetting the chip will restore the default

value. The default value is ‘1’ and writing a ‘1’ will set this bit to ‘1’. Reading this bit will return the last written value or the

default value if no write has been completed since the last reset.

10Base-T – This bit advertises the ability to the Link Partner that the RTL8208 can operate in 10Base-T half duplex mode.

Writing a ‘0’ to this bit will suppress the transmission of this ability to the Link Partner. Resetting the chip will restore the default

value. The default value is ‘1’ and writing a ‘1’ will set this bit to ‘1’. Reading this bit will return the last written value or the

default value if no write has been completed since the last reset.

Selector Field – Bits 4:0 contain a fixed value of 00001, indicating that the chip belongs to the 802.3 class of PHY transceivers.

2003/04/04

16

Rev.1.97

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