PE9601 Просмотр технического описания (PDF) - Peregrine Semiconductor
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PE9601 Datasheet PDF : 15 Pages
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PE9601
Product Specification
Enhancement Register
The functions of the enhancement register bits are shown below with all bits active “high”.
Table 9. Enhancement Register Bit Functionality
Bit Function
Description
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Reserved**
Reserved**
Reserved**
Power down
Counter load
Bit 5
MSEL output
Bit 6 Prescaler output
Bit 7
fp, fc OE
** Program to 0
Power down of all functions except programming interface.
Immediate and continuous load of counter programming as directed by the Bmode and
Smode inputs.
Drives the internal dual modulus prescaler modulus select (MSEL) onto the Dout output.
Drives the raw internal prescaler output (fmain) onto the Dout output.
fp, fc outputs disabled.
Phase Detector
The phase detector is triggered by rising edges
from the main Counter (fp) and the reference
counter (fc). It has two outputs, namely PD_U, and
PD_D. If the divided VCO leads the divided
reference in phase or frequency (fp leads fc), PD_D
pulses “high”. If the divided reference leads the
divided VCO in phase or frequency (fr leads fp),
PD_U pulses “high”. The width of either pulse is
directly proportional to phase offset between the
two input signals, fp and fc.
The signals from the phase detector couple directly
to a charge pump. PD_U controls a current source
at pin CP with constant amplitude and pulse
duration approximately the same as PD_U. PD_D
similarly drives a current sink at pin CP. The
current pulses from pin CP are low pass filtered
externally and then connected to the VCO tune
voltage. PD_U pulses result in a current source,
which increases the VCO frequency and PD_D
results in a current sink, which decreases VCO
frequency.
A lock detect output, LD is also provided, via the pin
Cext. Cext is the logical “OR” of PD_U and PD_D
waveforms, which is driven through a series 2 kohm
resistor. Connecting Cext to an external shunt
capacitor provides integration. Cext also drives the
input of an internal inverting comparator with an
open drain output. Thus LD is an “NOR” function of
PD_U and PD_D.
Copyright Peregrine Semiconductor Corp. 2001
Page 12 of 15
File No. 70/0025~02C | UTSi CMOS RFIC SOLUTIONS
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