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HIN202EIP

+/-15kV, ESD-Protected, +5V Powered, RS-232 Transmitters/Receivers

Intersil 

HIN202E thru HIN241E

Test Circuits (HIN232E)

0.1µF -

C3 +

0.1µF +

C1 -

1 C1+

2 V+

3 C1-

VCC 16

GND 15

T1OUT 14

0.1µF +

C2 -

4 C2+

5 C2-

R1IN 13

R1OUT 12

6 V-

T1IN 11

3kΩ 0.1µF C4 7 T2OUT T2IN 10

T2

OUTPUT

8 R2IN R2OUT 9

RS-232

±30V INPUT

+4.5V TO

+5.5V INPUT

3kΩ

T1 OUTPUT

RS-232 ±30V INPUT

TTL/CMOS OUTPUT

TTL/CMOS INPUT

TTL/CMOS INPUT

TTL/CMOS OUTPUT

FIGURE 1. GENERAL TEST CIRCUIT

1 C1+

2 V+

VCC 16

GND 15

3 C1-

4 C2+

T1OUT 14

R1IN 13

5 C2- R1OUT 12

6 V-

T1IN 11

7 T2OUT T2IN 10

8 R2IN R2OUT 9

ROUT = VIN/I

VIN = ±2V

T2OUT

T1OUT

A

FIGURE 2. POWER-OFF SOURCE RESISTANCE

CONFIGURATION

VOLTAGE DOUBLER

S1

C1+

S2

VCC

+

- C1

GND

S3

C1-

S4

RC

OSCILLATOR

VOLTAGE INVERTER

V+ = 2VCC S5

C2+

S6

+

- C3

VCC

GND

S7

+

- C2

C2-

S8

+

- C4

GND

V- = - (V+)

FIGURE 3. CHARGE PUMP

Detailed Description

The HIN2XXE family of high-speed RS-232

transmitters/receivers are powered by a single +5V power

supply, feature low power consumption, and meet all ElA

RS232C and V.28 specifications. The circuit is divided into

three sections: the charge pump, transmitter, and receiver.

Charge Pump

An equivalent circuit of the charge pump is illustrated in

Figure 3. The charge pump contains two sections: the

voltage doubler and the voltage inverter. Each section is

driven by a two phase, internally generated clock to generate

+10V and -10V. The nominal clock frequency is 125kHz.

During phase one of the clock, capacitor C1 is charged to

VCC . During phase two, the voltage on C1 is added to VCC,

producing a signal across C3 equal to twice VCC. During

phase two, C2 is also charged to 2VCC, and then during

phase one, it is inverted with respect to ground to produce a

signal across C4 equal to -2VCC. The charge pump accepts

input voltages up to 5.5V. The output impedance of the

3-12

voltage doubler section (V+) is approximately 200Ω, and the

output impedance of the voltage inverter section (V-) is

approximately 450Ω. A typical application uses 0.1µF

capacitors for C1-C4, however, the value is not critical.

Increasing the values of C1 and C2 will lower the output

impedance of the voltage doubler and inverter, increasing

the values of the reservoir capacitors, C3 and C4, lowers the

ripple on the V+ and V- supplies.

During shutdown mode (HIN205E, HIN206E, HIN211E,

HIN213E, HIN235E, HIN236E and HIN241E) the charge

pump is turned off, V+ is pulled down to VCC, V- is pulled up

to GND, and the supply current is reduced to less than 10µA.

The transmitter outputs are disabled and the receiver

outputs (except for HIN213E, R4 and R5) are placed in the

high impedance state.

Transmitters

The transmitters are TTL/CMOS compatible inverters which

translate the inputs to RS-232 outputs. The input logic

threshold is about 26% of VCC, or 1.3V for VCC = 5V. A logic

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