K20P64M72SF1 Просмотр технического описания (PDF) - Freescale Semiconductor

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K20P64M72SF1

K20 Sub-Family Supports: MK20DX64VLH7, MK20DX128VLH7, MK20DX256VLH7

Freescale Semiconductor 

General

Table 6. Power consumption operating behaviors (continued)

Symbol Description

Min.

Typ.

Max.

Unit

IDD_VBAT Average current when CPU is not accessing RTC

registers

• @ 1.8V

• @ –40 to 25°C

• @ 70°C

• @ 105°C

• @ 3.0V

—

0.57

0.67

μA

—

0.90

1.2

μA

—

2.4

3.5

μA

• @ –40 to 25°C

• @ 70°C

• @ 105°C

—

0.67

0.94

μA

—

1.0

1.4

μA

—

2.7

3.9

μA

Notes

10

1. The analog supply current is the sum of the active or disabled current for each of the analog modules on the device. See

each module's specification for its supply current.

2. 72MHz core and system clock, 36MHz bus clock, and 24MHz flash clock. MCG configured for FEE mode. All peripheral

clocks disabled.

3. 72MHz core and system clock, 36MHz bus clock, and 24MHz flash clock. MCG configured for FEE mode. All peripheral

clocks enabled.

4. Max values are measured with CPU executing DSP instructions.

5. 25MHz core, system, bus and flash clock. MCG configured for FEI mode.

6. 4 MHz core and system clock, 4 MHz and bus clock, and 1 MHz flash clock. MCG configured for BLPE mode. All

peripheral clocks disabled. Code executing from flash.

7. 4 MHz core and system clock, 4 MHz and bus clock, and 1 MHz flash clock. MCG configured for BLPE mode. All

peripheral clocks enabled but peripherals are not in active operation. Code executing from flash.

8. 4 MHz core and system clock, 4 MHz and bus clock, and 1 MHz flash clock. MCG configured for BLPE mode. All

peripheral clocks disabled.

9. Data reflects devices with 128 KB of RAM. For devices with 64 KB of RAM, power consumption is reduced by 2 μA.

10. Includes 32kHz oscillator current and RTC operation.

5.2.5.1 Diagram: Typical IDD_RUN operating behavior

The following data was measured under these conditions:

• MCG in FBE mode for 50 MHz and lower frequencies. MCG in FEE mode at greater

than 50 MHz frequencies.

• USB regulator disabled

• No GPIOs toggled

• Code execution from flash with cache enabled

• For the ALLOFF curve, all peripheral clocks are disabled except FTFL

K20 Sub-Family Data Sheet, Rev. 3, 11/2012.

16

Freescale Semiconductor, Inc.

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