NXP Semiconductors
MFRC522
Standard performance MIFARE and NTAG frontend
Table 16. Register and bit settings controlling the signal on pin TX2
Bit
Bit
Bit
Bit
Bit
Envelope Pin
Tx1RFEn Force Tx2CW InvTx2RFOn InvTx2RFOff
TX2
100ASK
0
X[1]
X[1]
X[1]
X[1]
X[1]
X[1]
1
0
0
0
1
1
0
1
1
0
0
1
1
0
1
X[1]
0
RF
1
RF
X[1]
0
RF_n
1
RF_n
X[1]
X[1]
RF
X[1]
X[1]
RF_n
X[1]
0
0
1
RF
X[1]
0
0
1
RF_n
X[1]
X[1]
RF
X[1]
X[1]
RF_n
GSPMos GSNMos Remarks
X[1]
pMod
pCW
pMod
pCW
pCW
pCW
pMod
pCW
pMod
pCW
pCW
pCW
X[1]
nMod
nCW
nMod
nCW
nCW
nCW
nMod
nCW
nMod
nCW
nCW
nCW
not specified if
RF is switched
off
-
conductance
always CW for
the Tx2CW bit
100 % ASK: pin
TX2 pulled
to logic 0
(independent of
the
InvTx2RFOn/Inv
Tx2RFOff bits)
[1] X = Do not care.
The following abbreviations have been used in Table 15 and Table 16:
• RF: 13.56 MHz clock derived from 27.12 MHz quartz crystal oscillator divided by 2
• RF_n: inverted 13.56 MHz clock
• GSPMos: conductance, configuration of the PMOS array
• GSNMos: conductance, configuration of the NMOS array
• pCW: PMOS conductance value for continuous wave defined by the CWGsPReg
register
• pMod: PMOS conductance value for modulation defined by the ModGsPReg register
• nCW: NMOS conductance value for continuous wave defined by the GsNReg
register’s CWGsN[3:0] bits
• nMod: NMOS conductance value for modulation defined by the GsNReg register’s
ModGsN[3:0] bits
• X = do not care.
Remark: If only one driver is switched on, the values for CWGsPReg, ModGsPReg and
GsNReg registers are used for both drivers.
MFRC522
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.9 — 27 April 2016
112139
© NXP Semiconductors N.V. 2016. All rights reserved.
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