SCI7638 Просмотр технического описания (PDF) - Seiko Epson Corp
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SCI7638 Datasheet PDF : 34 Pages
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SCI7630 Series
Reference voltage generator and output
voltage regulator
The reference voltage generator regulates VI1 to gener-
ate a votlage for the voltage regulator and voltage detec-
tion circuits.
The voltage regulator regulates the boosted output
votlage. This is determined by the level at point A be-
tween the two resistors connecting VO and GND. These
series use an on-chip resistor to set the output at a speci-
fied voltage.
Reference
voltage
generator
Output
voltage regulator
VI1
RC
oscillator
+
–
VSW
VO
A
GND
Note
In step-up voltage operation, the ripple voltage created
by the switching operation is large relative to the output
voltage described above. This ripple voltage is affected
by external components and load conditions. The user
is advised to check this voltage carefully.
Voltage detection
The SCI7631, SCI7632, SCI7638, and SCI7639 series
are equipped with a built-in voltage detection function.
The detection voltage, VDET, is fixed internally at 1.05
± 0.05V.
Power-on clear function
The SCI7631 series and SCI7638 series are equipped
with a built-in power-on clear function. As shown in
the following figure, R1 and C1 are connected to
PWCR, and R2 is connected to RST to operate the func-
tion. If VI1 drops below VDET, TR1 and TR2 conduct
and PWCR and RST are grounded. If VI1 recovers and
rises higher than VREL, TR1 turns OFF. The detection
voltage hysteresis is 5% (Typ.) and VREL is VDET ×
1.05 (Typ.).
SCI7631M
Voltage
detector
VI1
–
+
VO
R2
RST
Tr2
VO
VO
R1
PWCR
Tr1
C1
VO returns to its normal value when the voltage of
PWCR increases and TR2 turns OFF, so that RST re-
turns to VO after a delay specified by the time coeffi-
cient of R1 and C1. Thus, after normal output has been
obtained, a reset pulse of adjustable width can be ob-
tained which can reset a system connected to RST.
The output from RST is an N-channel, open-drain.
When VI1 exceeds VDET, the drain is opened and, when
VI1 drops below VDET again, the output transistor con-
ducts and the output is grounded. The characteristic re-
sponse is shown in the following figure.
VREL
VI1
VDET
VO
PWCR
VGND
VO
RST
VGND
Disabling power-on clear
Always connect PWCR to either VO or GND. If volt-
age detection only is required, remove the resistor be-
tween PWCR and VO and monitor the level at RST. If
neither function is required, connect PWCR to GND.
Leaving PWCR unconnected results in an undefined in-
verter gate voltage in the VO circuit, causing transient
currents to flow between VO and GND.
4–14
EPSON
SCI7000 Series
Technical Manual
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