ATSAMA5D34A-CU(2013) Просмотр технического описания (PDF) - Atmel Corporation

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производитель

ATSAMA5D34A-CU
(Rev.:2013)

ARM-based Embedded MPU

Atmel Corporation 

Table 4-1. SAMA5D3 Pinout for 324-ball LFBGA Package (Continued)

Primary

Alternate

PIO Peripheral A

Pin Power Rail

C2

VDDIOP0

G9

VDDIOP0

C1

VDDIOP0

H10

VDDIOP0

H9

VDDIOP0

D4

VDDIOP0

H8

VDDIOP0

G5

VDDIOP0

D3

VDDIOP0

E4

VDDIOP0

K5

VDDIOP1

P1

VDDIOP1

K6

VDDIOP1

R1

VDDIOP1

L7

VDDIOP1

P2

VDDIOP1

L8

VDDIOP1

R2

VDDIOP1

K7

VDDIOP1

U2

VDDIOP1

K9

VDDIOP1

M5

VDDIOP1

K10

VDDIOP1

N4

VDDIOP1

L9

VDDIOP1

N3

VDDIOP1

L10

VDDIOP1

N5

VDDIOP1

M6

VDDIOP1

T1

VDDIOP1

N2

VDDANA

M3

VDDANA

M2

VDDANA

L3

VDDANA

M1

VDDANA

N1

VDDANA

L1

VDDANA

L2

VDDANA

K1

VDDANA

K2

VDDANA

J1

VDDANA

J2

VDDANA

P13

VDDIOM

R14

VDDIOM

I/O Type

GPIO

GPIO

GPIO_CLK

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

MCI_CLK

GPIO

GPIO

GPIO_CLK

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO

GPIO_ANA

GPIO_ANA

GPIO_ANA

GPIO_ANA

GPIO_ANA

GPIO_ANA

GPIO_ANA

GPIO_ANA

GPIO_ANA

GPIO_ANA

GPIO_ANA

GPIO_ANA

EBI

EBI

Signal

PC22

PC23

PC24

PC25

PC26

PC27

PC28

PC29

PC30

PC31

PD0

PD1

PD2

PD3

PD4

PD5

PD6

PD7

PD8

PD9

PD10

PD11

PD12

PD13

PD14

PD15

PD16

PD17

PD18

PD19

PD20

PD21

PD22

PD23

PD24

PD25

PD26

PD27

PD28

PD29

PD30

PD31

PE0

PE1

Dir Signal Dir

Signal

Dir

I/O

SPI1_MISO

I/O

I/O

SPI1_MOSI

I/O

I/O

SPI1_SPCK

I/O

I/O

SPI1_NPCS0

I/O

I/O

SPI1_NPCS1

O

I/O

SPI1_NPCS2

O

I/O

SPI1_NPCS3

O

I/O

URXD0

I

I/O

UTXD0

O

I/O

FIQ

I

I/O

MCI0_CDA

I/O

I/O

MCI0_DA0

I/O

I/O

MCI0_DA1

I/O

I/O

MCI0_DA2

I/O

I/O

MCI0_DA3

I/O

I/O

MCI0_DA4

I/O

I/O

MCI0_DA5

I/O

I/O

MCI0_DA6

I/O

I/O

MCI0_DA7

I/O

I/O

MCI0_CK

I/O

I/O

SPI0_MISO

I/O

I/O

SPI0_MOSI

I/O

I/O

SPI0_SPCK

I/O

I/O

SPI0_NPCS0

I/O

I/O

SCK0

I/O

I/O

CTS0

I

I/O

RTS0

O

I/O

RXD0

I

I/O

TXD0

O

I/O

ADTRG

I

I/O

AD0

I

I/O

AD1

I

I/O

AD2

I

I/O

AD3

I

I/O

AD4

I

I/O

AD5

I

I/O

AD6

I

I/O

AD7

I

I/O

AD8

I

I/O

AD9

I

I/O

AD10

I

I/O

AD11

I

I/O

A0/NBS0

O

I/O

A1

O

PIO Peripheral B

Signal

Dir

TWD1

I/O

TWCK1

O

PWMFI0

I

PWMFI2

I

PWMFI1

I

TIOA0

I/O

TIOB0

I/O

TCLK0

I

SPI0_NPCS1

O

SPI0_NPCS2

O

SPI0_NPCS3

O

PCK0

O

PCK1

O

PIO Peripheral C

Signal

Dir

ISI_D11

I

ISI_D10

I

ISI_D9

I

ISI_D8

I

ISI_PCK

O

PWMH2

O

PWML2

O

PWMH3

O

PWML3

O

CANRX0

I

CANTX0

O

PWMFI3

I

Reset State

Signal, Dir,

PU, PD, HiZ,

ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

PIO, I, PU, ST

A,I, PD, ST

A,I, PD, ST

SAMA5D3 Series [SUMMARY DATASHEET] 13

11121AS–ATARM–31-Jan-13

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