AD6643 Просмотр технического описания (PDF) - Analog Devices

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AD6643

Dual IF Receiver

Analog Devices 

Data Sheet

PIN 1

INDICATOR

CLK+ 1

CLK– 2

SYNC 3

DNC 4

DNC 5

ORB– 6

ORB+ 7

DNC 8

DNC 9

DRVDD 10

B 0/D0– (LSB) 11

B 0/D0+ (LSB) 12

B D1–/D2– 13

B D1+/D2+ 14

B D3–/D4– 15

B D3+/D4+ 16

AD6643

CHANNEL

MULTIPLEXED

(EVEN/ODD)

LVDS MODE

TOP VIEW

(Not to Scale)

48 PDWN

47 OEB

46 CSB

45 SCLK

44 SDIO

43 ORA+

42 ORA–

41 A D9+/D10+ (MSB)

40 A D9–/D10– (MSB)

39 A D7+/D8+

38 A D7–/D8–

37 DRVDD

36 A D5+/D6+

35 A D5–/D6–

34 A D3+/D4+

33 A D3–/D4–

AD6643

NOTES

1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.

2. THE EXPOSED THERMAL PADDLE ON THE BOTTOM OF THE PACKAGE PROVIDES THE

ANALOG GROUND FOR THE PART. THIS EXPOSED PADDLE MUST BE CONNECTED TO

GROUND FOR PROPER OPERATION.

Figure 5. Pin Configuration (Top View), LFCSP Channel Multiplexed (Even/Odd) LVDS

Table 9. Pin Function Descriptions for the Channel Multiplexed (Even/Odd) LVDS Mode

Pin No.

Mnemonic

Type

Description

ADC Power Supplies

10, 19, 28, 37

DRVDD

Supply

Digital Output Driver Supply (1.8 V Nominal).

49, 50, 53, 54, 59, AVDD

60, 63, 64

Supply

Analog Power Supply (1.8 V Nominal).

4, 5, 8, 9, 26, 27, DNC

55, 56, 58

Do Not Connect. Do not connect to these pins.

0

AGND, Exposed

Ground

The exposed thermal paddle on the bottom of the package provides the

Paddle

analog ground for the part. This exposed paddle must be connected to

ground for proper operation.

ADC Analog

51

VIN+A

Input

Differential Analog Input Pin (+) for Channel A.

52

VIN−A

Input

Differential Analog Input Pin (−) for Channel A.

62

VIN+B

Input

Differential Analog Input Pin (+) for Channel B.

61

VIN−B

Input

Differential Analog Input Pin (−) for Channel B.

57

VCM

Output

Common-Mode Level Bias Output for Analog Inputs. This pin should be

decoupled to ground using a 0.1 μF capacitor.

1

CLK+

Input

ADC Clock Input—True.

2

CLK−

Input

ADC Clock Input—Complement.

Digital Input

3

SYNC

Input

Digital Synchronization Pin. Slave mode only.

Digital Outputs

7

ORB+

Output

Channel B LVDS Overrange Output—True. The overrange indication is valid on

the rising edge of the DCO.

6

ORB−

Output

Channel B LVDS Overrange Output—Complement. The overrange indication

is valid on the rising edge of the DCO.

11

B 0/D0− (LSB)

Output

Channel B LVDS Output 0/Data 0—Complement. The output bit on the rising

edge of the data clock output (DCO) from this output is always a Logic 0.

12

B 0/D0+ (LSB)

Output

Channel B LVDS Output 0/Data 0—True. The output bit on the rising edge of

the data clock output (DCO) from this output is always a Logic 0.

Rev. C | Page 13 of 40

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