M95040-RDW3T/G Просмотр технического описания (PDF) - STMicroelectronics

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Компоненты Описание

производитель

M95040-RDW3T/G

4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock - Compatible with SPI Bus Serial Interface

STMicroelectronics 

M95040, M95020, M95010

Revision history

Table 27. Document revision history (continued)

Date

Version

Changes

05-Oct-2004

06-Nov-2006

Product List summary table added. Process identification letter “G”

information added. Order information for Tape and Reel changed to T.

AEC-Q100-002 compliance. Device Grade information clarified. tHHQX

6.0 corrected to tHHQV. Signal Description updated.

10MHz, 5ms Write is now the present product. tCH+tCL<1/fC constraint

clarified

Document converted to new template, Table 5: Status Register format

moved to below Section 6.3: Read Status Register (RDSR).

PDIP package removed. UFDFPN8 (MB) package added (see Figure 20

and Table 25) and SO8N package specifications updated (see Figure 18

and Table 23). Packages are ECOPACK® compliant.

Section 6.7: Cycling added. Section 2.8: Supply voltage (VCC) added and

information removed below Section 4: Operating features.

Figure 3: Bus master and memory devices on the SPI bus modified.

TLEAD parameter modified, Note 1 changed, and TA added to Table 7:

7 Absolute maximum ratings.

Characteristics of previous product identified by process letter K removed.

CL modified in Table 11: AC test measurement conditions. Note removed

below Table 13 and Table 14.

Information in Table 17 is no longer Preliminary data, ICC, ICC1 and VIL

modified. End timing line of tSHQZ moved in Figure 17.

tCHHL and tCHHH changed to tCLHL and tCLHH, respectively in Figure 16,

Table 18, Table 19, Table 20, Table 21 and Table 22.

Plating Technology and Process updated in Table 26: Ordering

information scheme.

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